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A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits

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Abstract

This paper proposes a synthesized injection-locked bang-bang phased-locked loop (SILBBPLL) with high digital controlled oscillator (DCO) frequency resolution. The SILBBPLL is expressed with hardware description language and automatically placed & routed (APR) by using standard digital circuit design flow. As the mismatch issues of the circuits are not considered carefully during the APR design flow, the phase noise performance is severely deteriorated. We adopt pulse injection locking technique to improve the phase noise performance. The DCO frequency resolution is critical for reducing the reference spur in a digital injection-locked PLL. Therefore, we propose novel frequency tuning circuits to increase the DCO frequency resolution so that the reference spurs are reduced. The frequency tuning circuits consist of a standard cell based high-linearity output feedback DAC (OFDAC) and two custom varactors. The OFDAC is used to tune the frequency of the DCO with the custom varactor precisely. The custom varactor is firstly designed, added into the standard cell library, and APR with the standard cells. The SILBBPLL chip with a core area of 0.008 mm2 is implemented in 65 nm CMOS process. When operating at 1.8 GHz, the measured results show that the root-mean-square (RMS) jitter integrated from 10 kHz to 100 MHz is 1.1 ps, and the power consumption is 1.5 mW with a 0.8-V supply. The proposed SILBBPLL achieves a figure-of-merit (FoM) of −237.4 dB and a reference spur of −50.9 dBc.

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Acknowledgements

This work was supported by National Nature Science Foundation of China (Grant Nos. 61331003, 61474108, 61234003), and National Key Technology Research and Development Program of the Ministry of Science and Technology of China (Grant No. 2016ZX03001002).

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Authors and Affiliations

  1. State Key Laboratory for Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, 100083, China

    Jincheng Yang, Zhao Zhang, Nan Qi, Liyuan Liu, Jian Liu & Nanjian Wu

  2. University of Chinese Academy of Sciences, Beijing, 100083, China

    Jincheng Yang, Zhao Zhang, Nan Qi, Liyuan Liu, Jian Liu & Nanjian Wu

Authors
  1. Jincheng Yang
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  2. Zhao Zhang
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  3. Nan Qi
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  4. Liyuan Liu
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  5. Jian Liu
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  6. Nanjian Wu
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Correspondence to Liyuan Liu or Nanjian Wu.

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Yang, J., Zhang, Z., Qi, N. et al. A 0.45-to-1.8 GHz synthesized injection-locked bang-bang phase locked loop with fine frequency tuning circuits. Sci. China Inf. Sci. 62, 62405 (2019). https://doi.org/10.1007/s11432-018-9423-y

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  • DOI: https://doi.org/10.1007/s11432-018-9423-y

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