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Mitigating set-stuck failure in 3D phase change memory: substituting square pulses with surge pulses

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Abstract

In the devices that integrate phase change memory (PCM) and ovonic threshold switching (OTS), the OTS threshold voltage often surpasses the RESET operation voltage of PCM. The conventional application of square pulses hinders the successful completion of the SET operation in these integrated devices. To address this challenge, a novel pulse called the surge pulse is introduced, which comprises a high amplitude pulse for OTS activation and a low amplitude pulse for PCM operation. By employing COMSOL simulation, the operational effectiveness of both square pulses and surge pulses is validated. Test results reveal that using a square pulse to operate the integrated device accelerates the occurrence of SET-stuck failure (SSF). In contrast, the surge pulse enables the integrated device to operate for at least 1000 cycles while preserving the essential cyclic characteristics. Additionally, an investigation into the overshoot component of the surge pulse is conducted, revealing that an increase in overshoot amplitude and pulse width also accelerates the emergence of SSF. By applying the theory of ion migration induced by the electric field, the root cause of SSF in integrated devices is explained, and the accuracy of the theory is validated through the application of a reverse pulse. In summary, this study elucidates the rationality of replacing the square pulse with a surge pulse, presenting a superior approach for operating PCM and OTS integrated devices.

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References

  1. Lam C H. Phase change memory and its intended applications. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2014

  2. Kim T, Lee S. Evolution of phase-change memory for the storage-class memory and beyond. IEEE Trans Electron Dev, 2020, 67: 1394–1406

    Article  Google Scholar 

  3. Wong H S P, Raoux S, Kim S B, et al. Phase change memory. Proc IEEE, 2010, 98: 2201–2227

    Article  Google Scholar 

  4. Kim S G, Lee J C, Ha T J, et al. Breakthrough of selector technology for cross-point 25-nm ReRAM. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2017

  5. Burr G W, Shenoy R S, Virwani K, et al. Access devices for 3D crosspoint memory. J Vacuum Sci Tech B Nanotechnol MicroElectron-Mater Process Measurement Phenomena, 2014, 32: 040802

    Google Scholar 

  6. Chung H, Kim H, Kim H, et al. Novel 4F2 DRAM cell with vertical pillar transistor (VPT). In: Proceedings of the European Solid-State Device Research Conference (ESSDERC), 2011. 211–214

  7. Servalli G. A 45nm generation phase change memory technology. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2009. 1–4

  8. Chien W, Ho H, Yeh C, et al. Comprehensive scaling study on 3D cross-point PCM toward 1Znm node for SCM applications. In: Proceedings of Symposium on VLSI Technology, 2019. 60–61

  9. Cheng H Y, Carta F, Chien W C, et al. 3D cross-point phase-change memory for storage-class memory. J Phys D-Appl Phys, 2019, 52: 473002

    Article  Google Scholar 

  10. Ovshinsky S R. Reversible electrical switching phenomena in disordered structures. Phys Rev Lett, 1968, 21: 1450–1453

    Article  Google Scholar 

  11. Fritzsche H. Why are chalcogenide glasses the materials of choice for ovonic switching devices?. J Phys Chem Solids, 2007, 68: 878–882

    Article  Google Scholar 

  12. Kau D, Tang S, Karpov I V, et al. A stackable cross point phase change memory. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2009. 1–4

  13. Zhu M, Ren K, Song Z. Ovonic threshold switching selectors for three-dimensional stackable phase-change memory. MRS Bull, 2019, 44: 715–720

    Article  Google Scholar 

  14. Ding Y, An J, Shen J, et al. Low-voltage and high thermal stability single-element Te selector with failed bit pruning operation enabling robust cross-point memory. Adv Elect Mater, 2022, 8: 2200870

    Article  Google Scholar 

  15. Wang L, Cai W, He D, et al. Performance improvement of GeTex-based ovonic threshold switching selector by C doping. IEEE Electron Dev Lett, 2021, 42: 688–691

    Article  Google Scholar 

  16. Wang L, Wen J, Zhu R, et al. Failure mechanism investigation and endurance improvement in Te-rich Ge-Te based ovonic threshold switching selectors. Appl Phys Lett, 2022, 121: 193501

    Article  Google Scholar 

  17. Kim T, Choi H, Kim M, et al. High-performance, cost-effective 2z nm two-deck cross-point memory integrated by self-align scheme for 128 Gb SCM. In: Proceedings of IEEE International Electron Devices Meeting (IEDM), 2018

  18. Chien W C, Yeh C W, Bruce R L, et al. A study on OTS-PCM pillar cell for 3-D stackable memory. IEEE Trans Electron Dev, 2018, 65: 5172–5179

    Article  Google Scholar 

  19. Yoo S, Lee H D, Lee S, et al. Electro-thermal model for thermal disturbance in cross-point phase-change memory. IEEE Trans Electron Dev, 2020, 67: 1454–1459

    Article  Google Scholar 

  20. Gong N, Chien W, Ray A, et al. Superb endurance and appropriate Vth of PCM pillar cell using buffer layer for 3D cross-point memory. In: Proceedings of the 11th International Memory Workshop (IMW), 2019. 1–4

  21. Chien W, Gignac L, Gong N, et al. Solution for PCM and OTS intermixing on cross-point phase change memory. In: Proceedings of the 11th International Memory Workshop (IMW), 2019. 1–4

  22. Yoon S M, Choi K J, Lee N Y, et al. Nanoscale observations of the operational failure for phase-change-type nonvolatile memory devices using Ge2Sb2Te5 chalcogenide thin films. Appl Surf Sci, 2007, 254: 316–320

    Article  Google Scholar 

  23. Chen Z, Tong H, Cai W, et al. Modeling and simulations of the integrated device of phase change memory and ovonic threshold switch selector with a confined structure. IEEE Trans Electron Dev, 2021, 68: 1616–1621

    Article  Google Scholar 

  24. Lee S, Jeong J, Lee T S, et al. A study on the failure mechanism of a phase-change memory in write/erase cycling. IEEE Electron Dev Lett, 2009, 30: 448–450

    Article  Google Scholar 

  25. Yeo I, Chu M, Gi S G, et al. Stuck-at-fault tolerant schemes for memristor crossbar array-based neural networks. IEEE Trans Electron Dev, 2019, 66: 2937–2945

    Article  Google Scholar 

  26. Kim T H, Hong K, Kim S, et al. Fuse devices for pruning in memristive neural network. IEEE Electron Dev Lett, 2023, 44: 520–523

    Article  Google Scholar 

  27. Burr G W, Shelby R M, Sidler S, et al. Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element. IEEE Trans Electron Dev, 2015, 62: 3498–3507

    Article  Google Scholar 

  28. Wang Y, Wang Y, Chen X, et al. RESET failure analysis of phase change memory based on Ge2Sb2Te5. IEICE Electron Express, 2017, 14: 20170673

    Article  Google Scholar 

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Acknowledgements

This work was supported by National Key R&D Program of China (Grand No. 2021YFA1202804), National Natural Science Foundation of China (Grant No. 62174065), and Hubei Provincial Natural Science Foundation of China (Grant No. 2021CFA038). The authors acknowledge the support from Hubei Key Laboratory of Advanced Memories & Hubei Engineering Research Center on Microelectronics.

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Authors and Affiliations

  1. School of Integrated Circuits, Huazhong University of Science and Technology, Wuhan, 430074, China

    Ninghua Li, Wang Cai, Hao Tong, Weiming Cheng & Xiangshui Miao

  2. Hubei Yangtze Memory Laboratories, Wuhan, 430205, China

    Ninghua Li, Wang Cai, Hao Tong, Weiming Cheng & Xiangshui Miao

  3. Hubei Institute of Measurement and Testing Technology, Wuhan, 430205, China

    Jun Xiang

Authors
  1. Ninghua Li
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  2. Wang Cai
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  3. Jun Xiang
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  4. Hao Tong
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  5. Weiming Cheng
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  6. Xiangshui Miao
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Correspondence to Hao Tong or Weiming Cheng.

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Li, N., Cai, W., Xiang, J. et al. Mitigating set-stuck failure in 3D phase change memory: substituting square pulses with surge pulses. Sci. China Inf. Sci. 67, 152403 (2024). https://doi.org/10.1007/s11432-023-3902-6

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  • DOI: https://doi.org/10.1007/s11432-023-3902-6

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