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Accelerating the multiple reference frames compensation in the H.264 video coder

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Abstract

Using the multiple reference frames compensation in the H264 coder improves the coding efficiency for sequences which contain uncovered backgrounds, repetitive motions and highly textured areas. Unfortunately this technique requires excessive memory and computation resources. In this article, we proposed and implemented a technique based on Markov Random Fields Algorithm relying on robust moving pixel segmentation. By the introduction of this technique, we were able to decrease the number of reference frames from five to three while keeping similar video coding performances. The coding time decreased by 35% and the sequence quality was preserved. After the validation of our idea, we evaluated the processing time of the Markov algorithm on architectures intended for embedded multimedia applications. Both DSP and FPGA implementations were explored. We were able to process 50 frames(128 × 128)/s on the EP1S10 FPGA paltform and 35 frames(128 × 128)/s on the ADSP BF533.

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Authors and Affiliations

  1. Laboratoire SYEL, Université Pierre et Marie Curie, 4 place Jussieu, 75252, Paris Cedex 05, France

    Khalil Hachicha, David Faura, Olivier Romain & Patrick Garda

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  1. Khalil Hachicha
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  2. David Faura
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  3. Olivier Romain
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  4. Patrick Garda
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Correspondence to Khalil Hachicha.

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Hachicha, K., Faura, D., Romain, O. et al. Accelerating the multiple reference frames compensation in the H.264 video coder. J Real-Time Image Proc 4, 55–65 (2009). https://doi.org/10.1007/s11554-008-0101-1

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  • DOI: https://doi.org/10.1007/s11554-008-0101-1

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