Skip to main content
Springer Nature Link
Log in

Fast buffering for FPGA implementation of vision-based object recognition systems

  • Special Issue
  • Published:
Journal of Real-Time Image Processing Aims and scope Submit manuscript

Abstract

Real-time frame rate is an important factor for practical deployment of computer vision systems. Field programmable gate array (FPGA) technology has been considered for many applications due to its parallel computing capability. FPGA implementations of computer vision algorithms normally involve buffering data on external memory devices, which could slow down the whole system. This paper proposes a buffering scheme suitable for implementing real-time vision-based systems on an FPGA that does not require external memory to buffer data. A stop sign detection system implemented on an FPGA employing the proposed buffering scheme is presented as an example system. This system is capable of processing over 200 fps at the frame size of 480 × 752 pixels.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10

Similar content being viewed by others

References

  1. Bosi, B., Bois, G., Savaria, Y.: Reconfigurable pipelined 2d convolvers for fast digital signal processing. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 7, 299–308 (1999)

    Article  Google Scholar 

  2. Cao, T.P., Deng, G.: Real-time vision-based stop sign detection system on FPGA. In: Proceedings of the 2008 Digital Image Computing: Techniques and Applications, Canberra, Australia, pp. 465–471 (2008)

  3. Cardells-Tormo, F., Molinet, P.L.: Area-efficient 2-d shift-variant convolvers for FPGA-based digital image processing. IEEE Trans. Circuits Syst. II Express Briefs 53(2), 105–109 (2006)

    Article  Google Scholar 

  4. Dalal, N., Triggs, B.: Histograms of oriented gradients for human detection. In: Proceedings of the 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition, vol. 1, pp. 886–893 (2005)

  5. Dillinger, P., Vogelbruch, J., Leinen, J., Suslov, S., Patzak, R., Winkler, H., Schwan, K.: Fpga based real-time image segmentation for medical systems and data processing. IEEE Trans. Nucl. Sci. 53(4), 2097–2101 (2006)

    Article  Google Scholar 

  6. Frintrop, S., Klodt, M., Rome, E.: A real-time visual attention system using integral images. In: Proceedings of the 2007 International Conference on Computer Vision Systems, Germany, pp. 3385–3390 (2007)

  7. Hiromoto, M., Sugano, H., Miyamoto, R.: Partially parallel architecture for adaboost-based detection with haar-like features. IEEE Trans. Circuits Syst. Video Technol. 19(1), 41–52 (2009)

    Article  Google Scholar 

  8. Hsiao, P.Y., Yeh, C.W., Huang, S.S., Fu, L.C.: A portable vision-based real-time lane departure warning system: day and night. IEEE Trans. Veh. Technol. 58(4), 299–308 (2009)

    Google Scholar 

  9. Huang, W.C., Wu, C.H.: Adaptive color image processing and recognition for varying backgrounds and illumination conditions. IEEE J. IE 45, 351–357 (1998)

    Google Scholar 

  10. Khattab, K., Mitteran, J., Dubois, J., Matas, J.: Embedded system study for real time boosting based face detection. In: Proceedings of the 32nd Annual Conference on IEEE Industrial Electronics, pp. 3461–3465 (2006)

  11. Liang, X., Jean, J., Tomko, K.: Data buffering and allocation in mapping generalized template matching on reconfigurable systems. J. Supercomput. 19(1), 77–91 (2001)

    Article  MATH  Google Scholar 

  12. Liu, H.X., Ran, B.: Vision-based stop sign detection and recognition for intelligent vehicles. Transp. Res. Rec. 1748(1), 161–166 (2001)

    Article  Google Scholar 

  13. Loy, G., Barnes, N.: Fast shape-based road sign detection for a driver assistance system. In: Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, Japan, vol. 1, pp. 70–75 (2004)

  14. Messom, C., Barczak, A.: Stream processing of integral images for real-time object detection. In: PDCAT ’08: Proceedings of the 2008 Ninth International Conference on Parallel and Distributed Computing, Applications and Technologies, IEEE Computer Society, Washington, DC, USA, pp. 405–412 (2008)

  15. Nguyen, D., Halpuka, D.: Real-time face detection and lip feature extraction using field-programmable gate arrays. IEEE J. SMCB 36, 902–912 (2006)

    Google Scholar 

  16. Viola, P., Jones, M.: Rapid object detection using a boosted cascaded of simple features. In: Proceedings of the 2001 IEEE Computer Society Conference on Computer Vision and Pattern Recognition (CVPR’01), vol. 1, pp. 511–518 (2001)

  17. Xilinx Inc (2007) Virtex-4 Family Overview. Xilinx Inc

  18. Xilinx Inc (2009) Xilinx Virtex-6 Family Overview. Xilinx Inc

  19. Zhang, H., Xia, M., Hu, G.: A multiwindow partial buffering scheme for FPGA-based 2-d convolvers. IEEE Trans. Circuits Syst. II Express Briefs 54(2), 200–204 (2007)

    Article  Google Scholar 

  20. Zhang, W., Zelinsky, G., Samaras, D.: Real-time accurate object detection using multiple resolutions. In: Proceedings of the 2007 IEEE International Conference on Computer Vision, Rio De Janeiro, Brazil, vol. 1, pp 1–8 (2007)

Download references

Author information

Authors and Affiliations

  1. Department of Electronic Engineering, La Trobe University, Melbourne, Australia

    Tam P. Cao, Darrell Elton & Guang Deng

Authors
  1. Tam P. Cao
    View author publications

    You can also search for this author inPubMed Google Scholar

  2. Darrell Elton
    View author publications

    You can also search for this author inPubMed Google Scholar

  3. Guang Deng
    View author publications

    You can also search for this author inPubMed Google Scholar

Corresponding author

Correspondence to Tam P. Cao.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Cao, T.P., Elton, D. & Deng, G. Fast buffering for FPGA implementation of vision-based object recognition systems. J Real-Time Image Proc 7, 173–183 (2012). https://doi.org/10.1007/s11554-011-0201-1

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11554-011-0201-1

Keywords