Skip to main content
Springer Nature Link
Log in

Efficient DVFS for low power HEVC software decoder

  • Special Issue Paper
  • Published:
Journal of Real-Time Image Processing Aims and scope Submit manuscript

Abstract

Low power design is a primary concern for modern battery-driven devices and video applications such as video decoding are often the most resource intensive applications of consumer electronics devices. Modern embedded processors are now proven to support video applications with software. They are also equipped with advanced features including Dynamic Voltage Frequency Scaling and Dynamic Power Management in order to reduce their power consumption. High Efficiency Video Coding (HEVC) is the latest MPEG video standard offering state-of-the-art compression rates and advanced parallel processing solutions. This paper presents a low power real-time software architecture for a HEVC decoder. Software decoding fosters short time-to-market as it relies on software designs for a general purpose processor. The proposed architecture exploits the characteristics of the multicore ARM big.LITTLE System-on-a-Chip to provide a low power design. Extensive power measurements as well as real-time metrics are provided to compare the proposed architecture with state-of-the-art.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15

Similar content being viewed by others

Notes

  1. Optimized software refers in this paper to a code-source written with Single Instruction Multiple Data (SIMD) operations.

References

  1. Akyol, E., Van der Schaar, M.: Complexity model based proactive dynamic voltage scaling for video decoding systems. IEEE Trans. Multimedia, 1475–1492 (2007)

  2. Akyol, E., Van der Schaar, M.: Compression-aware energy optimization for video decoding systems with passive power. IEEE Trans. Circuits Syst. Video Technol. 18(9), 1300–1306 (2008)

    Article  Google Scholar 

  3. Bang, S.-Y., Bang, K., Yoon, S., Chung, E.-Y.: Run-time adaptive workload estimation for dynamic voltage scaling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(9), 1334–1347 (2009)

    Article  Google Scholar 

  4. BBC HEVC bistreams. ftp://ftp.kw.bbc.co.uk/hevc/hm-15.0-anchors/

  5. Benini, L., DeMicheli, G.: Dynamic Power Management: Design Techniques and CAD Tools. Springer, Berlin (2012)

    Google Scholar 

  6. Benmoussa, Y., Senn, E., Derouineau, N., Tizon, N., Boukhobza, J.: Green metadata based adaptive DVFS for energy efficient video decodings. In: Proceedings of International Workshop on Power and Timing Modeling, Optimization and Simulation PATMOS

  7. Benmoussa, Y., Boukhobza, J., Senn, E., Hadjadj-Aoul, Y., Benazzouz, D.: A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous soc and its applications. J. Syst. Archit. 61(1), 49–70 (2015)

    Article  Google Scholar 

  8. Bossen, J.F., Bross, B., Suhring, K., Flynn, D.: HEVC complexity and implementation analysis. IEEE Trans. Circuits Syst. Video Technol. 22, 1685–1696 (2012)

    Article  Google Scholar 

  9. Bross, B., Alvarez-Mesa, M., George, V., Chi-Ching, C., Mayer, T., Juurlink, B., Schierl, T.: HEVC real-time decoding. In: SPIE Conference on Applications of Digital Image Processing. San Diego, California (2012)

  10. Chi, C.C., Alvarez-Mesa, M., Juurlink, B., Clare, G., Henry, F., Pateux, S., Schier, T.: Parallel scalability and efficiency of HEVC parallelization approaches. IEEE Trans. Circuits Syst. Video Technol. 22, 1827–1838 (2012)

    Article  Google Scholar 

  11. Chi, C., Alvarez-Mesa, M., Lucas, J., Juurlink, B., Schierl, T.: Parallel HEVC decoding on multi- and many-core architectures. J. Signal Process. Syst. 71(3), 247–260 (2013). doi:10.1007/s11265-012-0714-2. ISSN 1939-8018

    Article  Google Scholar 

  12. Chi, C.C., Alvarez-Mesa, M., Juurlink, B.: Low-power high-efficiency video decoding using general-purpose processors. ACM Trans. Archit. Code Optim. 11(4), 56 (2014)

    Google Scholar 

  13. Clare, G., Henry, F., Pateux, S.: Wavefront parallel processing for HEVC encoding and decoding. In: document JCTVC-F274. Torino, Italy (2011)

  14. Context, objectives, use cases and requirements for green MPEG. In: ISO/IEC JTC1/SC29/WG11/N13468 (2013)

  15. Embedding content information in video streams for energy-efficient video processing on mobile devices. ISO/IEC JTC1/SC29/WG11 MPEG2012/m24982, Geneva (2012)

  16. FFmpeg: open source and cross-platform multimedia library. http://www.ffmpeg.org

  17. Gutnik, V., Chandrakasan, A.P.: Embedded power supply for low-power DSP. IEEE Trans. Very Large Scale Integr. Syst. 5(4), 425–435 (1997)

    Article  Google Scholar 

  18. Hamidouche, W., Raulet, M., Deforges, O.: Parallel SHVC decoder: implementation and analysis. In: 2014 IEEE International Conference on Multimedia and Expo (ICME), pp. 1–6 (2014). doi:10.1109/ICME.2014.6890300

  19. Hansen, F., Kjaerg, G.: Complexity model based proactive dynamic voltage scaling for video decoding systems. Math. Ann. 258(3), 229–1241 (1982)

    Article  MathSciNet  Google Scholar 

  20. High efficiency video coding. In: Rec. ITU-T H.265 and ISO/IEC 23008-2. Sapporo, JP (2013)

  21. Jejurikar, R., Pereira, C., Gupta, R.: Leakage aware dynamic voltage scaling for real-time embedded systems. In: Proceedings of the 41st Annual Design Automation Conference, pp. 275–280. ACM (2004)

  22. Kim, W., Shin, D., Yun, H.-S., Kim, J., Min, S.-L.: Performance comparison of dynamic voltage scaling algorithms for hard real-time systems. In: Real-Time and Embedded Technology and Applications Symposium, 2002. Proceedings. Eighth IEEE, pp. 219–228 (2002)

  23. Liu, T.-M., Chang, Y.-C., Wang, C.-M., Lin, H.-M., Cheng, C.-Y., Chen, C.-C., Chiu, M.-H., Wang, S.-J., Chao, P., Hu, M.-J., et al.: Energy and area efficient hardware implementation of 4K Main-10 HEVC decoder in Ultra-HD Blu-ray player and TV systems. In: 2015 IEEE International Conference on Multimedia and Expo (ICME), pp. 1–6. IEEE (2015)

  24. Lu, Z., Lach, J., Stan, M., Skadron, K.: Reducing multimedia decode power using feedback control. In: Proceedings. 21st International Conference on Computer Design, 2003, pp. 489–496. IEEE (2003)

  25. Ma, Z., Hu, H., Wang, Y.: On complexity modeling of H.264/AVC video decoding and its application for energy efficient decoding. IEEE Trans. Multimedia 13(6), 1240–1255 (2011)

    Article  Google Scholar 

  26. Meenderinck, C., Azevedo, A., Alvarez, M., Juurlink, B., Ramirez, A.: Parallel scalability of video decoders. J. Signal Process. Syst. 57, 173–194 (2009)

    Article  Google Scholar 

  27. Nogues, E., Berrada, R., Pelcat, M., Menard, D., Raffin, E.: A DVFS based HEVC decoder for energy-efficient software implementation on embedded processors. In: 2015 IEEE International Conference on Multimedia and Expo (ICME), pp. 1–6. IEEE (2015)

  28. Nogues, E., Pelcat, M., Menard, D., Mercat, A.: Energy efficient scheduling of real time signal processing applications through combined DVFS and DPM. In: 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), pp. 622–626. IEEE (2016)

  29. Ohm, J.R., Sullivan, G.J., Schwarz, H., Tan, T.K., Wiegand, T.: Comparaison of the coding efficiency of video coding standards including high efficiency video coding (HEVC). IEEE Trans. Circuits Syst. Video Technol. 22, 1858–1870 (2012)

    Article  Google Scholar 

  30. Open source HEVC decoder (OpenHEVC). https://github.com/OpenHEVC

  31. Poirier, M.: In kernel switcher: a solution to support arm’s new big.little technology. In: Embedded Linux Conference

  32. Raffin, E., Nogues, E., Hamidouche, W., Tomperi, S., Pelcat, M., Menard, D.: Low power HEVC software decoder for mobile devices. J. Real-Time Image Process. 1–13 (2015)

  33. Rangan, K.K., Wei, G.-Y., Brooks, D.: Thread motion: fine-grained power management for multi-core systems. In: ACM SIGARCH Computer Architecture News, vol. 37, pp. 302–313. ACM (2009)

  34. Samsung. Evaluation on exynos.bl processor. In: Korea Linux Forum. Linux Foundation (2012)

  35. Sullivan, G.J., Ohm, J.R., Han, W.J., Wiegand, T.: Overview of the high efficiency video coding standard. IEEE Trans. Circuits Syst. Video Technol. 22, 1648–1667 (2012)

    Article  Google Scholar 

  36. Sze, V., Budagavi, M., Sullivan, G.J.: High Efficiency Video Coding (HEVC). Springer, Berlin (2014)

    Book  Google Scholar 

  37. Tan, Y., Malani, P., Qiu, Q., Wu, Q.: Workload prediction and dynamic voltage scaling for MPEG decoding. In: Proceedings of the 2006 Asia and South Pacific Design Automation Conference, pp. 911–916. IEEE Press (2006)

  38. Tikekar, M., Huang, C.T., Juvekar, C., Sze, V., Chandrakasan, A.P.: HEVC complexity and implementation analysis. IEEE J. Solid-State Circuits 49, 1685–1696 (2014)

    Article  Google Scholar 

  39. Wiegand, T., Sullivan, G.J., Bjontegaard, G., Luthra, A.: Overview of the H.264/AVC video coding standard. IEEE Trans. Circuit Syst. Video Technol. 13(7), 560–576 (2003)

    Article  Google Scholar 

  40. Yao, F., Demers, A., Shenker, S.: A scheduling model for reduced CPU energy. In: Proceedings of the 36th Annual Symposium on Foundations of Computer Science, pp. 374. IEEE Computer Society (1995)

Download references

Acknowledgments

This work is partially supported by BPI France, Region Ile-de-France, Region Bretagne and Rennes Metropole through the GreenVideo Project.

Author information

Authors and Affiliations

  1. IETR, UMR CNRS 6164, UEB, INSA Rennes, 20 Avenue des Buttes de Coesmes, 35708, Rennes, France

    Erwan Nogues, Julien Heulot, Glenn Herrou, Ladislas Robin, Maxime Pelcat, Daniel Menard, Erwan Raffin & Wassim Hamidouche

  2. Institut Pascal, UMR CNRS 6602, Campus Universitaire des Cézeaux, 4 Impasse Blaise Pascal, 63178, Aubière, France

    Maxime Pelcat

Authors
  1. Erwan Nogues
    View author publications

    You can also search for this author inPubMed Google Scholar

  2. Julien Heulot
    View author publications

    You can also search for this author inPubMed Google Scholar

  3. Glenn Herrou
    View author publications

    You can also search for this author inPubMed Google Scholar

  4. Ladislas Robin
    View author publications

    You can also search for this author inPubMed Google Scholar

  5. Maxime Pelcat
    View author publications

    You can also search for this author inPubMed Google Scholar

  6. Daniel Menard
    View author publications

    You can also search for this author inPubMed Google Scholar

  7. Erwan Raffin
    View author publications

    You can also search for this author inPubMed Google Scholar

  8. Wassim Hamidouche
    View author publications

    You can also search for this author inPubMed Google Scholar

Corresponding author

Correspondence to Erwan Nogues.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Nogues, E., Heulot, J., Herrou, G. et al. Efficient DVFS for low power HEVC software decoder. J Real-Time Image Proc 13, 39–54 (2017). https://doi.org/10.1007/s11554-016-0624-9

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11554-016-0624-9

Keywords