Abstract
The H.266/Versatile Video Coding (VVC) standard, released in July 2020, has improved the encoder performance over the previous High Efficiency Video Coding (HEVC) with a significant increase in coding complexity. Enhancements on the transform module mainly involve the introduction of the Adaptive Multiple Transform (AMT) which has led to an additional computational complexity. This paper aims at reducing the transform module complexity by approximating the AMT core. The transform approximation has to reach a low MSE, a low total error energy, a low transform distortion and a high transform efficiency. The Particle Swarm Optimization (PSO) is used to solve the optimization problem modeled as a constrained one. The proposed approximate transforms preserve a good coding efficiency compared to the exact transforms and require a less arithmetic complexity as well. The hardware architectures of both the exact and the approximate versions of the 8, and 16-point DST VII transform are designed. The exact transforms are defined using multipliers and MCM-based designs. The approximate transforms are described using additions and bit-shifting operations. All the designs are implemented in the Arria 10 FPGA device. Synthesis results have shown that the proposed approximation saves more than 75% and 63% of logic utilization when compared to multipliers and MCM-based designs, respectively. The maximum operational frequency is of 180 MHz, supporting 2K and 4K videos at 231 and 58 fps, respectively.






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Ben Jdidia, S., Belghith, F., Sallem, A. et al. Hardware implementation of PSO-based approximate DST transform for VVC standard. J Real-Time Image Proc 19, 87–101 (2022). https://doi.org/10.1007/s11554-021-01160-5
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DOI: https://doi.org/10.1007/s11554-021-01160-5