Abstract
Recently, security in embedded system arises attentions because of modern electronic devices need cautiously either exchange or communicate with the sensitive data. Although security is classical research topic in worldwide communication, the researchers still face the problems of how to deal with these resource constraint devices and enhance the features of assurance and certification. Therefore, some computations of cryptographic algorithms are built on hardware platforms, such as field program gate arrays (FPGAs). The commonly used cryptographic algorithms for digital signature algorithm (DSA) are rivest-shamir-adleman (RSA) and elliptic curve cryptosystems (ECC) which based on the presumed difficulty of factoring large integers and the algebraic structure of elliptic curves over finite fields. Usually, RSA is computed over GF(p), and ECC is computed over GF(p) or GF(2p). Moreover, embedded applications need advance encryption standard (AES) algorithms to process encryption and decryption procedures. In order to reuse the hardware resources and meet the trade-off between area and performance, we proposed a new triple functional arithmetic unit for computing high radix RSA and ECC operations over GF(p) and GF(2p), which also can be extended to support AES operations. A new high radix signed digital (SD) adder has been proposed to eliminate the carry propagations over GF(p). The proposed unified design took up 28.7% less hardware resources than implementing RSA, ECC, and AES individually, and the experimental results show that our proposed architecture can achieve 141.8MHz using approximately 5.5k CLBs on Virtex-5 FPGA.
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Yi Wang received the BEng and MEng degrees Northwestern Polytechnical University, China in 2000 and 2003, and the PhD degree from the School of Computer Engineering, Nanyang Technological University, Singapore in 2008. She worked as a post DOC in crypto group at Université Catholique de Louvain, Belgium from 2009 to 2010. And she was a lecture at College of Information Technology and Engineering, Hunan University from 2010 to 2011. From December 2011, she worked as research fellow in Electrical & Computer Engineering at National University of Singapore. Her research interests are in the general area of embedded security, with the focus on high performance cryptographic bricks and side-channel resistant algorithms.
Renfa Li is a professor in the College of Information Science and Engineering at Hunan University. He received the BEng and MEng degrees from Tianjin University, China in 1982 and 1987, and the PhD degree from Huazhong University of Sciences and Technology, China in 2003. He was a professor at Hunan Technology University from 1987 to 1999. From 2000, he became the dean at the College of Computer and Communication, Hunan University. His research interests are in the areas of embedded system architecture, cyber-physical system, and wireless networks. He is the founder of Embedded Systems & Networking Laboratory of Hunan University, and the leader of Hunan Provincial Key Laboratory of Network and Information Security of Hunan University.
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Wang, Y., Li, R. FPGA based unified architecture for public key and private key cryptosystems. Front. Comput. Sci. 7, 307–316 (2013). https://doi.org/10.1007/s11704-013-2187-2
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DOI: https://doi.org/10.1007/s11704-013-2187-2