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CADSE: communication aware design space exploration for efficient run-time MPSoC management

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Abstract

Real-time multi-media applications are increasingly mapped on modern embedded systems based on multiprocessor systems-on-chip (MPSoC). Tasks of the applications need to be mapped on the MPSoC resources efficiently in order to satisfy their performance constraints. Exploring all the possible mappings, i.e., tasks to resources combinations exhaustively may take days or weeks. Additionally, the exploration is performed at design-time, which cannot handle dynamism in applications and resources’ status. A runtime mapping technique can cater for the dynamism but cannot guarantee for strict timing deadlines due to large computations involved at run-time. Thus, an approach performing feasible compute intensive exploration at design-time and using the explored results at run-time is required. This paper presents a solution in the same direction. Communicationaware design space exploration (CADSE) techniques have been proposed to explore different mapping options to be selected at run-time subject to desired performance and available MPSoC resources. Experiments show that the proposed techniques for exploration are faster over an exhaustive exploration and provides almost the same quality of results.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, National University of Singapore, Singapore, 119077, Singapore

    Amit Kumar Singh & Akash Kumar

  2. School of Computer Science and Software Engineering, Tianjin Polytechnic University, Tianjin, 300160, China

    Jigang Wu

  3. School of Computer Engineering, Nanyang Technological University, Singapore, 639798, Singapore

    Amit Kumar Singh & Thambipillai Srikanthan

Authors
  1. Amit Kumar Singh
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  2. Akash Kumar
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  3. Jigang Wu
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  4. Thambipillai Srikanthan
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Correspondence to Amit Kumar Singh.

Additional information

Some part of this research was presented in Proceedings of International Symposium on Parallel Architectures, Algorithms and Programming (PAAP). 2011, 72–76

Amit Kumar Singh received the BS. in Electronics Engineering from Indian School of Mines, Dhanbad, India, in 2006. Thereafter, he worked with HCL Technologies, India for a year and half. He joined Nanyang Technological University (NTU), Singapore, in 2008 and worked at Centre for High Performance Embedded Systems (CHiPES), School of Computer Engineering, NTU, Singapore as a research student towards the completion of his PhD till January 2012. Since February 2012, he has been working with the Department of Electrical and Computer Engineering, NUS as a post doctoral researcher. His research interests include networkon-chip (NoC) based multiprocessor systems-on-chip (MPSoC), design space exploration (DSE), and run-time mapping techniques for MPSoC. He has published over 15 papers in leading related international journals/conferences.

Akash Kumar received the BS in Computer Engineering from the National University of Singapore (NUS), Singapore, in 2002. He received the joint Master of Technological Design degree in embedded systems from NUS and the Eindhoven University of Technology (TUe), Eindhoven, The Netherlands, in 2004, and received the joint PhD in Electrical Engineering in the area of embedded systems from TUe and NUS, in 2009. Since 2009, he has been with the Department of Electrical and Computer Engineering, NUS. Currently, he is an assistant professor in the department. His research interests include analysis, architectures, design methodologies, and resource management of embedded multiprocessor systems. He has published over 40 papers in leading international electronic design automation journals and conferences.

Jigang Wu received the BS from Lanzhou University, China in 1983 and PhD from University of Science and Technology of China (USTC) in 2000. He was with the Department of Computer Science of Lanzhou University, China from 1983 to 1993, as an assistant professor, and with the Department of Computer Science and Engineering of Yantai University, China from 1993 to 2000, as an associate professor. He was with the Center for High Performance Embedded Systems, School of Computer Engineering, Nanyang Technological University, Singapore from 2000 to 2009, as a postdoctoral research fellow. He has published more than 100 technical papers including journals in IEEE Transactions, IEE Proceedings and other reputed international journals. His research interests include in reconfigurable VLSI design, hardware/software co-design, parallel computing, and combinatorial search.

Thambipillai Srikanthan joined Nanyang Technological University (NTU), Singapore in 1991. He holds a full professor and joint appointment as Director of a 100 strong Centre for High Performance Embedded Systems (CHiPES). He founded CHiPES in 1998 and elevated it to a university level research Centre in February 2000. His research interests include design methodologies for complex embedded systems, architectural translations of compute intensive algorithms, computer arithmetic and high-speed techniques for image processing and dynamic routing. He has published more than 250 technical papers including 60 journals in IEEE Transactions, IEE Proceedings and other reputed international journals. He was awarded the Public Administration Medal (Bronze) on 2006 National Day in recognition of his contributions to education in Singapore.

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Singh, A.K., Kumar, A., Wu, J. et al. CADSE: communication aware design space exploration for efficient run-time MPSoC management. Front. Comput. Sci. 7, 416–430 (2013). https://doi.org/10.1007/s11704-013-2196-1

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