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A verification framework for spatio-temporal consistency language with CCSL as a specification language

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Abstract

The Spatio-Temporal Consistency Language (STeC) is a high-level modeling language that deals natively with spatio-temporal behaviour, i.e., behaviour relating to certain locations and time. Such restriction by both locations and time is of first importance for some types of real-time systems. CCSL is a formal specification language based on logical clocks. It is used to describe some crucial safety properties for real-time systems, due to its powerful expressiveness of logical and chronometric time constraints. We consider a novel verification framework combining STeC and CCSL, with the advantages of addressing spatio-temporal consistency of system behaviour and easily expressing some crucial time constraints. We propose a theory combining these two languages and a method verifying CCSL properties in STeC models. We adopt UPPAAL as the model checking tool and give a simple example to illustrate how to carry out verification in our framework.

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References

  1. Chen Y. STeC: a location–triggered specification language for real–time systems. In: Proceedings of the 15th IEEE International Symposium on Object/Component/Service–Oriented Real–Time Distributed Computing Workshops. 2012, 1–6

    Google Scholar 

  2. Wu H, Chen Y, Zhang M. On denotational semantics of spatialtemporal consistency language–STeC. In: Proceedings of International Symposium on Theoretical Aspects of Software Engineering. 2013, 113–120

    Google Scholar 

  3. Hoare C A R. Communicating sequential processes. Communications of the ACM, 1978, 21(8): 666–677

    Article  Google Scholar 

  4. Milner R. A Calculus of Communicating Systems. Secaucus, NJ, USA: Springer–Verlag New York, 1982

    Google Scholar 

  5. Reed G M, Roscoe AW. A timed model for communicating sequential processes. Theoretical Computer Science, 1988, 58(1–3): 249–261

    Article  MathSciNet  Google Scholar 

  6. Wang Y. CCS + time = an interleaving model for real time systems. In: Proceedings of International Colloquium on Automata, Languages and Programming. 1991, 217–228

    Google Scholar 

  7. Cardelli L, Gordon A D. Mobile ambients. Theoretical Computer Science, 2000, 240(1): 177–213

    Article  MathSciNet  Google Scholar 

  8. Milner R, Parrow J, Walker D. A calculus of mobile processes. Information and Computation, 1992, 100(1): 1–40

    Article  MathSciNet  Google Scholar 

  9. André C, Mallet F. Clock constraint specification language: specifying clock constraints with UML/MARTE. Innovations in Systems and Software Engineering, 2008, 4(3): 309–314

    Article  Google Scholar 

  10. Lamport L. Time, clocks, and the ordering of events in a distributed system. Communications of the ACM, 1978, 21(7): 558–565

    Article  Google Scholar 

  11. OMG. UML profile for MARTE: modeling and analysis of real–time embedded systems. Technical Report, 2009

    Google Scholar 

  12. Baier C, Katoen J P. Principles of Model Checking (Representation and Mind Series). Cambridge, Mass: The MIT Press, 2008

    MATH  Google Scholar 

  13. IEEE. IEEE standard for property specification language (PSL). New York: Institute of Electrical and Electronics Engineers, 2010

    Google Scholar 

  14. Gascon R, Mallet F, Deantoni J. Logical time and temporal logics: comparing UML MARTE/CCSL and PSL. In: Proceedings of the 18th International Symposium on Temporal Representation and Reasoning. 2011, 141–148

    Google Scholar 

  15. André C, Mallet F, De Simone R. Modeling time(s). In: Proceedings of the International Conference on Model Driven Engineering Languages and Systems. 2007, 559–573

    Chapter  Google Scholar 

  16. Behrmann G, David A, Larsen K G. A Tutorial on UPPAAL. Berlin Heidelberg: Springer, 2004, 200–236

    Book  Google Scholar 

  17. Suryadevara J, Seceleanu C, Mallet F, Pettersson P. Verifying MARTE/CCSL mode behaviors using UPPAAL. In: Proceedings of the International Conference on Software Engineering and Formal Methods. 2013, 1–15

    Google Scholar 

  18. Zhang Y, Mallet F, Chen Y. Timed automata semantics of spatialtemporal consistency language STeC. In: Proceedings of Theoretical Aspects of Software Engineering Conference. 2014, 201–208

    Google Scholar 

  19. Mallet F, Simone R. Correctness issues on MARTE/CCSL constraints. Science of Computer Programming, 2015, 106: 78–92

    Article  Google Scholar 

  20. André C. Syntax and semantics of the clock constraint specification language (CCSL). Research Report RR–6925 INRIA, 2009

    Google Scholar 

  21. Mallet F. Logical Time @ Work for the Modeling and Analysis of Embedded Systems. Saarbrücken Allemagn: LAP Lambert Academic Publishing, 2011

    Google Scholar 

  22. Mallet F, Millo J V, Simone R. Safe CCSL specifications and marked graphs. In: Proceedings of ACM/IEEE International Conference on Formal Methods and Models for Codesign. 2013, 157–166

    Google Scholar 

  23. Alur R, Dill D L. A theory of timed automata. Theoretical Computer Science, 1994, 126(2): 183–235

    Article  MathSciNet  Google Scholar 

  24. Mallet F. Automatic generation of observers from MARTE/CCSL. In: Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping. 2012, 86–92

    Google Scholar 

  25. Huth M, Ryan M. Logic in Computer Science: Modelling and Reasoning about Systems. Cambridge: Cambridge University Press, 2004

    Book  Google Scholar 

  26. Rumbaugh J, Jacobson I, Booch G. Unified Modeling Language Reference Manual. Boston: Addison–Wesley, 2005

    Google Scholar 

  27. Chen Y W, Chen Y X, Madelaine E. Timed–pNets: a communication behavioural semantic model for distributed systems. Frontiers of Computer Science, 2015, 9(1): 87–110

    Article  MathSciNet  Google Scholar 

  28. Deantoni J, Mallet F. Timesquare: treat your models with logical time. In: Proceedings of the 50th International Conference on Modelling Techniques and Tools for Computer Permance Evaluation. 2012, 34–41

    Google Scholar 

  29. He J. A clock–based framework for construction of hybrid systems. In: Proceedings of International Colloquium on Theoretical Aspects of Computing. 2013, 22–41

    Google Scholar 

  30. Xu B, Zhang L. Formal specification of cyber physical systems: three case studies based on clock theory. In: Proceedings of IEEE International Conference on Green Computing and Communications (Green–Com) and IEEE Internet of Things (iThings) and IEEE Cyber, Physical and Social Computing (CPSCom). 2013, 804–811

    Google Scholar 

  31. André C, Mallet F. Specification and verification of time requirements with CCSL and Esterel. In: Proceedings of ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems. 2009, 167–176

    Google Scholar 

  32. Berry G, Gonthier G. The esterel synchronous programming language: design, semantics, implementation. Science of Computer Programming, 1992, 29(2): 87–152

    Article  Google Scholar 

  33. Yin L, Mallet F, Liu J. Verification of MARTE/CCSL time requirements in Promela/Spin. In: Proceedings of the 16th IEEE International Conference on Engineering of Complex Computer Systems. 2011, 65–74

    Google Scholar 

  34. Holzmann G J. The model checker Spin. IEEE Transactions on Software Engineering, 1997, 23(5): 279–295

    Article  Google Scholar 

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Acknowledgements

This work was supported by the National Natural Science Foundation of China (Grant Nos. 61370100, 61321064), Shanghai Knowledge Service Platform Project (ZF1213), Shanghai Municipal Science and Technology Commission Project (14511100400) and Defense Industrial Technology Development Program JCKY (2016212B004-2).

Specially thank Professor Hengyang Wu, who gave us many usable proposals and found out many syntax errors in this paper. Also thank all reviewers for their time to carefully read this paper and give their valuable questions and suggestions.

Author information

Authors and Affiliations

  1. MoE Engineering Research Center for Software/Hardware Co-design Technology and Application, East China Normal University, Shanghai, 200062, China

    Yuanrui Zhang & Yixiang Chen

  2. University Nice Sophia Antipolis, I3S, UMR 7271 CNRS, INRIA, 06900, Sophia Antipolis, France

    Frédéric Mallet

Authors
  1. Yuanrui Zhang
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  2. Frédéric Mallet
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  3. Yixiang Chen
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Corresponding authors

Correspondence to Frédéric Mallet or Yixiang Chen.

Additional information

Yuanrui Zhang is a Phd student in the School of Computer Science and Software Engineering, East China Normal University, China. He received his BS degree in pure and applied mathematics, and his MS degree in computer science. His current research interests are verification of real-time systems, interactive proving theory and its application, formal modelling and verification of cyber-physical systems. Now he is working on verification of CCSL specifications using logical approach.

Frédéric Mallet is a full professor in the Informatics Department, University of Nice Sophia Antipolis, France. He is also a member of the KAIROS team-project, a joint team between the I3S laboratory (UMR CNRS) and the INRIA research center Sophia-Antipolis Méditerranée. His current research interests focus on modelling, simulation and verification of real-time and embedded systems, model-driven engineering, parallel and distributed computing, computer architecture, modelling and verification of cyber-physical systems. Professor Mallet is one of co-inventors of CCSL language and a contributor to Time Square, a simulation tool for CCSL. He was deeply involved as a voting member of MARTE RTF for the definition of the Time and allocation sub-profiles.

Yixiang Chen is a full Professor in the School of Computer Science and Software Engineering, East China Normal University, China. Where he is coordinating trustworthy software, Internet of things and Human-Cyber-Physical System related research activities. Professor Chen is the director of the MoE Engineering Research Center for Software/Hardware Co-design Technology and Application. He is a Vice-Chairman of Technical Committee for Embedded System China Computer Federation.

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Zhang, Y., Mallet, F. & Chen, Y. A verification framework for spatio-temporal consistency language with CCSL as a specification language. Front. Comput. Sci. 14, 105–129 (2020). https://doi.org/10.1007/s11704-018-7054-8

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  • DOI: https://doi.org/10.1007/s11704-018-7054-8

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