Abstract
With the recent demonstration of quantum computers, interests in the field of reversible logic synthesis and optimization have taken a different turn. As every quantum operation is inherently reversible, there is an immense motivation for exploring reversible circuit design and optimization. When it comes to faults in circuits, the parity-preserving feature donates to the detection of permanent and temporary faults. In the context of reversible circuits, the parity-preserving property ensures that the input and output parities are equal. In this paper we suggest six parity-preserving reversible blocks (Z, F, A, T, S, and L) with improved quantum cost. The reversible blocks are synthesized using an existing synthesis method that generates a netlist of multiple-control Toffoli (MCT) gates. Various optimization rules are applied at the reversible circuit level, followed by transformation into a netlist of elementary quantum gates from the NCV library. The designs of full-adder and unsigned and signed multipliers are proposed using the functional blocks that possess parity-preserving properties. The proposed designs are compared with state-of-the-art methods and found to be better in terms of cost of realization. Average savings of 25.04%, 20.89%, 21.17%, and 51.03%, and 18.59%, 13.82%, 13.82%, and 27.65% respectively, are observed for 4-bit unsigned and 5-bit signed multipliers in terms of quantum cost, garbage output, constant input, and gate count as compared to recent works.
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Mojtaba Noorallahzadeh received the BS degree in Computer Software Engineering Technology from Mehestan Sabz North Tonkabon Higher Applied Scientific Education Center, Iran in 2011, and the MS degree in Architecture of Computer Systems from Islamic Azad University, Iran in 2018. His research interests include the synthesis and optimization of reversible and quantum circuits, quantum-dot cellular automata (QCA), Internet of Things (IoT), and embedded systems.
Mohammad Mosleh received the BS degree in Computer Hardware Engineering from Islamic Azad University, Iran in 2003, the MS degree in Architecture of Computer Systems from Islamic Azad University, Science and Research Branch, Iran in 2006 as well as the PhD degree in Computer Engineering from the Islamic Azad University, Science and Research Branch, Tehran, Iran in 2010. He is an associate professor in the Department of Computer Engineering at the Islamic Azad University, Iran. His research interests are in audio security (watermarking and steganography), nano computing including quantum-dot cellular automata (QCA) and reversible circuits.
Kamalika Datta completed her Master of Science (MS) from Indian Institute of Technology Kharagpur, India in 2010, and PhD from Indian Institute of Engineering Science and Technology (IIEST), India in 2014. She joined the National Institute of Technology Meghalaya, India as an assistant professor in the Department of Computer Science and Engineering in 2014. She is presently working as a researcher at the University of Bremen, Germany. She has published more than 80 papers in peer-reviewed journals and conferences. Her research interests include logic design using emerging technologies, synthesis and optimization of reversible and quantum circuits, and embedded systems.
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A New Design of Parity Preserving Reversible Multipliers Based on Multiple-Control Toffoli Synthesis Targeting Emerging Quantum Circuits
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Noorallahzadeh, M., Mosleh, M. & Datta, K. A new design of parity-preserving reversible multipliers based on multiple-control toffoli synthesis targeting emerging quantum circuits. Front. Comput. Sci. 18, 186908 (2024). https://doi.org/10.1007/s11704-023-2492-3
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DOI: https://doi.org/10.1007/s11704-023-2492-3