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An effective fault localization approach for Verilog based on enhanced contexts

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The HDL research community recognizes the pivotal role of bug localization in the debugging workflow, offering substantial relief to developers. This paper introduces ContextHD, a robust bug localization method tailored for Verilog, leveraging enhanced contexts. ContextHD integrates static slicing techniques with advanced suspiciousness measurement methods to generate a prioritized list of statements based on their suspicious values, arranged in descending order. Our experimental evaluation involved comparing ContextHD with seven established state-of-the-art bug localization techniques. The results unequivocally demonstrate that ContextHD outperforms these methods significantly. Future endeavors include refining ContextHD to further enhance its accuracy.

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Acknowledgments

This work was partially supported by the Guangdong Province Ordinary University Characteristic Innovation Project (2023KTSCX193).

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Correspondence to Lei Xia.

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Competing interests The authors declare that they have no competing interests or financial conflicts to disclose.

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Zhang, Z., Li, Y., Xia, L. et al. An effective fault localization approach for Verilog based on enhanced contexts. Front. Comput. Sci. 18, 185108 (2024). https://doi.org/10.1007/s11704-024-2622-6

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  • DOI: https://doi.org/10.1007/s11704-024-2622-6