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Optimal floor planning in VLSI using improved adaptive particle swarm optimization

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Abstract

Floor planning is necessary to design the VLSI circuit. The complete computational characteristics of the manufactured chip are evaluated by floor planning process. It is the multi-objective problem in which different objectives are fulfilled at a time. Here, a new Interactive Self-Improvement based Adaptive Particle Swarm Optimization (ISI-APSO) technique is proposed to enhance the exploration efficiency and accuracy than convolutional PSO. Within less computation time the proposed ISI-APSO technique attains best global search throughout the space. The simulation results show that the proposed ISI-APSO algorithm achieves better performance than other heuristic algorithms in exploring efficiency and speed of convergence. In order to place the whole modules and their internally connected wire lengths, the Multi-objective optimization method is utilized. Therefore the necessary layout area is minimized. Moreover, the implemented results demonstrate the importance of the proposed algorithm with respect to the robust performance.

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Abbreviations

VLSI:

Very-large-scale integration

IC:

Integrated circuit

ISI-APSO:

Interactive Self-Improvement based Adaptive Particle Optimization

IP:

Intellectual property

IO:

Input output

NP-hard:

Non-deterministic polynomial-time hard

SA:

Simulated annealing

ACO:

Ant colony optimization

SA:

Simulated annealing

DE:

Differential evolution

PSOEM:

PSO improved Cauchy inertia weight Particle Swarm Optimization

PSONIW:

Nonlinear inertia weight variation in Particle Swarm Optimization

PSORIW:

Random function inertia weight Particle Swarm Optimization

PSODIW:

Dynamic inertia weight Particle Swarm Optimization

PSOEIW:

Evolutionary based inertia weight Particle Swarm Optimization

CI:

Confidence interval

IIR:

Infinite impulse response

AR:

Attractor–repeller

GLS:

Guided local search

MBS:

Moving block sequence

TSVs:

Through-silicon vias

AWPSO:

Adaptive weight PSO

GA:

Genetic algorithm

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Authors and Affiliations

  1. School of Engineering and Technology, Bangalore, 562112, India

    S. B. Vinay Kumar

  2. Vignana Bharathi Institute of Technology, Ghatkesar, Hyderabad, 501301, India

    P. V. Rao

  3. School of Engineering Technology, Bangalore, India

    Manoj Kumar Singh

Authors
  1. S. B. Vinay Kumar
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  2. P. V. Rao
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  3. Manoj Kumar Singh
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Correspondence to S. B. Vinay Kumar.

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Vinay Kumar, S.B., Rao, P.V. & Singh, M.K. Optimal floor planning in VLSI using improved adaptive particle swarm optimization. Evol. Intel. 15, 925–938 (2022). https://doi.org/10.1007/s12065-019-00256-z

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