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FPGA hardware acceleration of an improved chaos-based cryptosystem for real-time image encryption and decryption

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Abstract

This paper introduces a full Xilinx FPGA-Zynq implementation of a robust cryptosystem for real-time image encryption and decryption. Firstly, a strong chaos-based digital pseudo-random number generator is proposed to generate high-quality keys. Secondly, a robust algorithm is suggested to encrypt and decrypt images. The latter ensures the data confusion and diffusion properties. Finally, the hardware architecture of the proposed algorithm is put forward. The algorithm is designed, implemented and validated on a Xilinx FPGA-Zynq evaluation platform using the Vivado/system generator tool. The synthesis results indicate that the proposed hardware cryptosystem operates on a smaller FPGA area and achieves a high frequency of 142.8 MHz with a high throughput of 3408 Mb/s. The architecture is flexible to further performance. Beyond higher performance, the cryptosystem provides high-level security. The information entropy of the encrypted image has achieved an average of 7.9998 which is the most important feature of randomness. The DPRNG is thoroughly evaluated using the NIST 800-22 test suite. The obtained result indicates that the DPRNG provides high-quality random number sequences. As a consequence, the proposed cryptosystem can be used for image encryption and decryption in real-time applications.

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Acknowledgements

This work is supported by the authors.

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Authors and Affiliations

  1. Laboratoire d’Electronique et de Microélectronique, Université de Monastir, LR99ES30, 5000, Monastir, Tunisia

    Mohamed Gafsi, Mohamed Ali Hajjaji, Jihene Malek & Abdellatif Mtibaa

  2. National School of Engineers of Monastir, Monastir University, Monastir, Tunisia

    Mohamed Gafsi & Abdellatif Mtibaa

  3. Higher Institute of Applied Sciences and Technology, Sousse University, Sousse, Tunisia

    Mohamed Ali Hajjaji & Jihene Malek

Authors
  1. Mohamed Gafsi
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  2. Mohamed Ali Hajjaji
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  3. Jihene Malek
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  4. Abdellatif Mtibaa
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Correspondence to Mohamed Gafsi.

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Gafsi, M., Hajjaji, M.A., Malek, J. et al. FPGA hardware acceleration of an improved chaos-based cryptosystem for real-time image encryption and decryption. J Ambient Intell Human Comput 14, 7001–7022 (2023). https://doi.org/10.1007/s12652-021-03555-5

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  • DOI: https://doi.org/10.1007/s12652-021-03555-5

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