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Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization

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Abstract

In this paper, a hybrid population based meta-heuristic search algorithm named as gravitational search algorithm (GSA) combined with particle swarm optimization (PSO) (GSA–PSO) is proposed for the optimal designs of two commonly used analog circuits, namely, complementary metal oxide semiconductor (CMOS) differential amplifier circuit with current mirror load and CMOS two-stage operational amplifier circuit. PSO and GSA are simple, population based robust evolutionary algorithms but have the problem of suboptimality, individually. The proposed GSA–PSO based approach has overcome this disadvantage faced by both the PSO and the GSA algorithms and is employed in this paper for the optimal designs of two amplifier circuits. The transistors’ sizes are optimized using GSA–PSO in order to minimize the areas occupied by the circuits and to improve the design/performance parameters of the circuits. Various design specifications/performance parameters are optimized to optimize the transistor’s sizes and some other design parameters using GSA–PSO. By using the optimal transistor sizes, Simulation Program with Integrated Circuit Emphasis simulation has been carried out in order to show the performance parameters. The simulation results justify the superiority of GSA–PSO over differential evolution, harmony search, artificial bee colony and PSO in terms of convergence speed, design specifications and performance parameters of the optimal design of the analog CMOS amplifier circuits. It is shown that GSA–PSO based design technique for each amplifier circuit yields the least MOS area, and each designed circuit is shown to have the best performance parameters like gain, power dissipation etc., as compared with those of other recently reported literature. Still the difficulties and challenges faced in this work are proper tuning of control parameters of the algorithms GSA and PSO, some conflicting design/performance parameters and design specifications, which have been partially overcome by repeated manual tuning. Multi-objective optimization may be the proper alternative way to overcome the above difficulties.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, NIT Durgapur, Durgapur, India

    S. Mallick, R. Kar & D. Mandal

  2. Department of Electrical Engineering, NIT Durgapur, Durgapur, India

    S. P. Ghoshal

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  1. S. Mallick
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  2. R. Kar
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Correspondence to R. Kar.

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Mallick, S., Kar, R., Mandal, D. et al. Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization. Int. J. Mach. Learn. & Cyber. 8, 309–331 (2017). https://doi.org/10.1007/s13042-014-0324-3

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