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Harder, better, faster, stronger: elliptic curve discrete logarithm computations on FPGAs

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Abstract

Computing discrete logarithms takes time. It takes time to develop new algorithms, choose the best algorithms, implement these algorithms correctly and efficiently, keep the system running for several months, and, finally, publish the results. In this paper, we present a highly performant architecture that can be used to compute discrete logarithms of Weierstrass curves defined over binary fields and Koblitz curves using FPGAs. We used the architecture to compute for the first time a discrete logarithm of the elliptic curve sect113r1, a previously standardized binary curve, using 10 Kintex-7 FPGAs. To achieve this result, we investigated different iteration functions, used a negation map, dealt with the fruitless cycle problem, built an efficient FPGA design that processes 900 million iterations per second, and we tended for several months the optimized implementations running on the FPGAs.

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Acknowledgments

The authors are grateful to the University of Applied Sciences Upper Austria who provided 16 ML605 boards, the companies so-logic GmbH Co KG and Xilinx, Inc. who provided us with several Kintex-7 FPGAs, and colleagues who recommended to take advantage of the simultaneous inversion technique. This work has been supported by the European Commission through the FP7 program under project number 610436 (project MATTHEW), and the Secure Information Technology Center-Austria (A-SIT).

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Correspondence to Erich Wenger.

Appendices

Appendix A: Targeted curve and target point pair selection

figure a

To proof that the discrete logarithm was actually computed without knowing it in advance, a point generation function was needed. The Sage code in Listing 1 was used to deterministically and pseudo-randomly generate two points with order n using Sage. As P and Q are generated pseudo-randomly, their discrete logarithm is unknown. The Sage script also checks the point orders and the validity of the computed result. Table 5 summarizes all parameters needed for the discrete logarithm computation.

Table 5 Curve parameters of targeted elliptic curve sect113r1

Appendix B: Binary Karatsuba \(\mathbb {F}_{2^{113}}\) multiplier

Algorithm 1 gives the top-level \(\mathbb {F}_{2^{113}}\) multiplier formulas. KS64, KS32, and KS16 are 64-bit, 32-bit, and 16-bit binary Karatsuba multipliers, respectively.

figure b

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Wenger, E., Wolfger, P. Harder, better, faster, stronger: elliptic curve discrete logarithm computations on FPGAs. J Cryptogr Eng 6, 287–297 (2016). https://doi.org/10.1007/s13389-015-0108-z

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