Skip to main content
SpringerLink
Log in

Methods and Analysis of Automated Trace Alignment Under Power Obfuscation in Side Channel Attacks

  • Published:
Journal of Hardware and Systems Security Aims and scope Submit manuscript

Abstract

Embedded systems are widely deployed in life-critical systems, but system constraints often limit the depth of security used in these devices, potentially leaving them open to numerous threats. Side channel attacks (SCAs) are a popular attack to extract sensitive information from embedded systems using only side channel leakage. Existing research has focused on obfuscating the sensitive data and operations with the assumption that attackers can readily and automatically identify the location of the sensitive operations in each trace, which is needed to align traces for a successful SCA. However, this is not always the true as the target sensitive data may be randomly located within side channel leakage trace, which necessitates the use of automatic preprocessing to identifying those locations. Limited research has focused on the evaluation of identifying these locations and the difficulty for attacker to identify the location of sensitive information within side channel leakage traces. This paper presents a methodology for evaluating power obfuscation approaches that seek to obfuscate the location of sensitive operation within the power trace, thereby significantly increasing the complexity of automated trace alignment. This paper presents a new adversary model and proposes a new metric, mean trials to success (MTTS), to evaluate different power obfuscation methods in the context of automated trace alignment. We evaluate two common obfuscation methods, namely, instruction shuffling and random instruction insertion, and we present a new obfuscation method using power shaping to intentionally mislead the attacker.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9

Similar content being viewed by others

References

  1. Lu Y, Boey KH, O'Neill M, McCanny JV (2009) Practical comparison of differential power analysis techniques on an ASIC implementation of the AES algorithm. ISSC 2009, Dublin, p 1–6

  2. Mayer-Sommer R (2000) Smartly analyzing the simplicity and the power of simple power analysis on smartcards. In: Cryptographic Hardware and Embedded Systems, Springer-Verlag, p 78–92

  3. Kocher P, Jaffe J, Jun B (1999) Differential power analysis. In: Advances in cryptology—CRYPTO’99, Berlin, Heidelberg, p 789–789

  4. Chari S, Rao JR, Rohatgi P (2002) Template attacks. In: International Workshop on Cryptographic Hardware and Embedded Systems, Berlin, Heidelberg, p 13–28

  5. Brier E, Clavier C, Olivier F (2008) Correlation power analysis with a leakage model. In: International Workshop on Cryptographic Hardware and Embedded Systems, Berlin, Heidelberg, p 16–29

  6. Gierlichs B, Batina L, Tuyls P, Preneel B (2008) Mutual information analysis. CHES 2008:426–442

    Google Scholar 

  7. Herbst C, Oswald E, Mangard S (2006) An AES smart card implementation resistant to power analysis attack. In: Annual International Conference on Applied Cryptography and Network Security, p 239–252

  8. Messerges TS (2002) Using Second-order power analysis to attack DPA resistant software. In: International Workshop on Cryptographic Hardware and Embedded Systems, Berlin, Heidelberg, p 238–251

  9. Callan R, Zajic A, Prvulovic M (2014) A practical methodology for measuring the side-channel signal available to the attacker for instruction-level events. In: 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, Cambridge, p 242–254

  10. Demme J, Martin R, Waksman A, Sethumadhavan S (2013) A quantitative, experimental approach to measuring processor side-channel security. IEEE Micro 33(3):68–77

  11. Gebotys CH (2006) A table masking countermeasure for low-energy secure embedded systems. IEEE TVLSI Sys 14(7):740–753

    Article  Google Scholar 

  12. Fei Y, Ding AA, Lao J, Zhang L. (2014) A statistics-based fundamental model for side-channel attack analysis. IACR Cryptol ePrint Arch

  13. Renauld M, Standaert FX, Veyrat-Charvillon N, Kamel D, Flandre D (2011) A formal study of power variability issues and side-channel attacks for nanoscale devices. Eurocrypt 6632:109–128

    MATH  Google Scholar 

  14. Van Woudenberg JG, Witteman MF, Bakker B (2011) Improving differential power analysis by elastic alignment. In: Cryptographers’ Track at the RSA Conference, Berlin, Heidelberg, p 104–119

  15. Tian Q, Huss SA (2012) On the attack of misaligned traces by power analysis methods. In: 2012 Seventh ICCES, Cairo, p 28–34

  16. Tian Q, Huss SA (2012) On clock frequency effects in side channel attacks of symmetric block ciphers. In: International Conference NTMS, Istanbul, p 1–5

  17. Batina L, Gierlichs B, Prouff E, Rivain M, Standaert FX, Veyrat-Charvillon N (2011) Mutual information analysis: a comprehensive study. J Cryptol 24(2):269–291

    Article  MathSciNet  Google Scholar 

  18. Tillich S, Herbst C (2008) Attacking state-of-the-art software countermeasures—a case study for AES CHES 2008 Lecture Notes in Computer Science, p 228–243

  19. Eldib H, Wang C, Taha M, Schaumont P (2015) Quantitative masking strength: quantifying the power side-channel resistance of software code. IEEE Trans Comput Aided Des Integr Circuits Syst 34(10):1558–1568

    Article  Google Scholar 

  20. Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S, Sen R (2011) The Gem5 Simulator. ACM SIGARCH Comput Architecture News 39(2):1–7

    Article  Google Scholar 

  21. Li S, Anh JH, Strong RD, Brockman JB, Tullsen DM, Jouppi NP (2009) McPAT: an integrated power, area, and timing modeling framework for multi-core and manycore architectures. In: Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, p 469–480

  22. Rechberger C, Oswald E (2004) Practical template attacks. In: International Workshop on Information Security Applications, Springer, Berlin, Heidelberg, p 440–456

  23. Standaert FX, Malkin TG, Yung M (2009) A unified framework for the analysis of side-channel key recovery attacks. In: Annual International Conference on the Theory and Applications of Cryptographic Techniques, Springer, Berlin, Heidelberg, p 443–461

  24. Archambeau C, Peeters E, Standaert FX, Quisquater JJ (2006) Template attacks in principal subspaces. In: International Workshop on Cryptographic Hardware and Embedded Systems, Springer, Berlin, Heidelberg

  25. Veyrat-Charvillon N, Standaert FX (2009) Mutual information analysis: how, when and why? CHES 2009. Springer, Berlin, Heidelberg, pp 429–443

    MATH  Google Scholar 

  26. Choudary O, Kuhn MG (2013) Efficient template attacks international conference on smart card research and advanced applications. Springer, Cham, p 253–270

  27. Oswald E, Mangard S (2007) Template attacks on masking—resistance is futile. In: Cryptographers’ track at the RSA conference, Springer, Berlin, Heidelberg, p 243–256

  28. Prouff E, Rivain M (2013) Masking against side-channel attacks: a formal security proof. In: Annual International Conference on the Theory and Applications of Cryptographic Techniques, Springer, Berlin, Heidelberg, p 142–159

  29. Peeters E, Standaert FX, Donckers N, Quisquater JJ (2005) Improved higher-order side-channel attacks with FPGA experiments. In: International Workshop on Cryptographic Hardware and Embedded Systems, Springer, Berlin, Heidelberg, p 309–323

  30. Rivain M, Prouff E (2017) Provably secure higher-order masking of AES. In: International Workshop on Cryptographic Hardware and Embedded Systems, Springer, Berlin, Heidelberg, p 413–427

  31. ARM MBED AES (2017) Accessed: https://tls.mbed.org/aes-source-code

  32. Liu B, Chen K, Seo M, Roveda J, Lysecky R (2018) Evaluation of the complexity of automated trace alignment using novel power obfuscation methods. In: ACM Great Lakes Symposium on VLSI (GLSVLSI), Chicago, IL USA

  33. Thiebeauld H, Gagnerot G, Wurcker A, Clavier C (2018) Scatter: a new dimension in side-channel. In: International Workshop on Constructive Side-Channel Analysis and Secure Design, Springer, Cham, p 135–152

  34. Agosta G, Barenghi A, Pelosi G, Scandale M (2015) The MEET approach: securing cryptographic embedded software against side channel attacks. IEEE Trans Comput Aided Des Integr Circuits Syst 34(8):1320–1333

  35. Cagli E, Dumas C, Prouff E (2017) Convolutional neural networks with data augmentation against jitter-based countermeasures. In: Fischer W, Homma N (eds) Cryptographic Hardware and Embedded Systems – CHES 2017. CHES 2017. Lecture Notes in Computer Science. 10529, Springer, Cham. https://doi.org/10.1007/978-3-319-66787-4_3

  36. Althoff A, McMahan J, Vega L, Davidson S, Sherwood T, Taylor M, Kastner R (2018) Hiding intermittent information leakage with architectural support for blinking. In: 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), IEEE, p 638–649

  37. Golder A, Das D, Danial J, Ghosh S, Sen S, Raychowdhury A (2019) Practical approaches toward deep-learning-based cross-device power side-channel attack. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27(2):2720–2733. https://doi.org/10.1109/TVLSI.2019.2926324

Download references

Funding

This research was supported by the Army Research Office under Grant W911NF-16–1-0130.

Author information

Authors and Affiliations

  1. Electrical and Computer Engineering, University of Arizona, Tucson, AZ, USA

    Bozhi Liu, Kemeng Chen, Janet M. Roveda & Roman Lysecky

  2. Center for Embedded and Cyber-Physical Systems, University of California At Irvine, Irvine, CA, USA

    Minjun Seo

Authors
  1. Bozhi Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Kemeng Chen
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Minjun Seo
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Janet M. Roveda
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Roman Lysecky
    View author publications

    You can also search for this author in PubMed Google Scholar

Contributions

Bozhi (20), Kemeng (15), Minjun (15), Janet (20), Roman (20).

Corresponding author

Correspondence to Bozhi Liu.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Liu, B., Chen, K., Seo, M. et al. Methods and Analysis of Automated Trace Alignment Under Power Obfuscation in Side Channel Attacks. J Hardw Syst Secur 5, 127–142 (2021). https://doi.org/10.1007/s41635-021-00117-1

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s41635-021-00117-1

Keywords

Search

Navigation