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FPT-spike: a flexible precise-time-dependent single-spike neuromorphic computing architecture

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Abstract

Modern Artificial Neural networks (ANNs) like Convolutional Neural Network (CNN), have found broad applications in real-world cognitive tasks. One challenging faced by these models is their tremendous memory and computing resource requirement. This also greatly hinders their adoptions from resource-constraint platforms, such as drone, mobile phone and IoT devices. Recently the brain-inspired spiking neural network (SNN) has been demonstrated as a promising solution for delivering more impressive computing and power efficiency. For SNNs, a large body of prior work were conducted on the spiking system design with a focus on using the spike firing rate (or rate-coded) for fulfilling the practical cognitive tasks. Such rate-based designs can underestimate the energy efficiency, throughput and system flexibility of SNNs. On the other hand, the potentials of time-based SNN are not fully unleashed in real applications due to lack of efficient coding and practical learning schemes in temporal domain. In this work, we make an early attempt to fill this gap: that said, a flexible precise-time-dependent single-spike neuromorphic computing architecture, namely “FPT-Spike”, is developed. “FPT-spike” relies on three hardware-favorable components: precise ultra-sparse spike temporal encoding, efficient supervised temporal learning and fast asymmetric decoding, to realize flexible spatial–temporal information trade-off for neural network size reduction without scarifying data processing capability. Extensive experimental results show that “FPT-Spike” outperforms rate-based SNN and ANN significantly in three aspects: network size, processing speed and power consumption, demonstrating great potentials for its deployment in edge devices.

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References

  • Akopyan, F., Sawada, J., Cassidy, A., Alvarez-Icaza, R., Arthur, J., Merolla, P., Imam, N., Nakamura, Y., Datta, P., Nam, G.J., et al.: Truenorth: Design and tool flow of a 65 mw 1 million neuron programmable neurosynaptic chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(10), 1537–1557 (2015)

    Google Scholar 

  • Andri, R., Cavigelli, L., Rossi, D., Benini, L.: Yodann: An ultra-low power convolutional neural network accelerator based on binary weights. In: VLSI (ISVLSI), 2016 IEEE Computer Society Annual Symposium on, pp. 236–241. IEEE (2016)

  • Borst, A., Theunissen, F.E.: Information theory and neural coding. Nat. Neurosci. 2(11), 947–957 (1999)

    Google Scholar 

  • Burkitt, A.N.: A review of the integrate-and-fire neuron model: I. homogeneous synaptic input. Biol. Cybern. 95(1), 1–19 (2006)

    MathSciNet  MATH  Google Scholar 

  • Butts, D.A., Weng, C., Jin, J., Yeh, C.I., Lesica, N.A., Alonso, J.M., Stanley, G.B.: Temporal precision in the neural code and the timescales of natural vision. Nature 449(7158), 92–95 (2007)

    Google Scholar 

  • Cao, Y., Chen, Y., Khosla, D.: Spiking deep convolutional neural networks for energy-efficient object recognition. Int. J. Comput. Vision 113(1), 54–66 (2015)

    MathSciNet  Google Scholar 

  • Chu, M., Kim, B., Park, S., Hwang, H., Jeon, M., Lee, B.H., Lee, B.G.: Neuromorphic hardware system for visual pattern recognition with memristor array and cmos neuron. IEEE Trans. Ind. Electron. 62(4), 2410–2419 (2015)

    Google Scholar 

  • Ciresan, D.C., Meier, U., Gambardella, L.M., Schmidhuber, J.: Convolutional neural network committees for handwritten character classification. In: Document Analysis and Recognition (ICDAR), 2011 International Conference on, pp. 1135–1139. IEEE (2011)

  • Corradi, F., Indiveri, G.: A neuromorphic event-based neural recording system for smart brain-machine-interfaces. IEEE Trans. Biomed. Circuits Syst. 9(5), 699–709 (2015)

    Google Scholar 

  • Diehl, P.U., Cook, M.: Unsupervised learning of digit recognition using spike-timing-dependent plasticity. Frontiers in computational neuroscience 9, (2015)

  • Esser, S.K., Merolla, P.A., Arthur, J.V., Cassidy, A.S., Appuswamy, R., Andreopoulos, A., Berg, D.J., McKinstry, J.L., Melano, T., Barch, D.R., et al.: Convolutional networks for fast, energy-efficient neuromorphic computing. Proc. Natl. Acad. Sci p. 201604850 (2016)

  • Farabet, C., LeCun, Y., Kavukcuoglu, K., Culurciello, E., Martini, B., Akselrod, P., Talay, S.: Large-scale fpga-based convolutional networks. Scaling up Machine Learning: Parallel and Distributed Approaches pp. 399–419 (2011)

  • Farmahini-Farahani, A., Ahn, J.H., Morrow, K., Kim, N.S.: Nda: Near-dram acceleration architecture leveraging commodity dram devices and standard memory modules. In: High Performance Computer Architecture (HPCA), 2015 IEEE 21st International Symposium on, pp. 283–295. IEEE (2015)

  • Gerstner, W.: A framework for spiking neuron models: the spike response model. Handb. Biol. Phys. 4, 469–516 (2001)

    Google Scholar 

  • Goodman, D.F., Brette, R.: The brian simulator. Front. Neurosci, 3, 26 (2009)

    Google Scholar 

  • Gütig, R., Sompolinsky, H.: The tempotron: a neuron that learns spike timing-based decisions. Nat. Neurosci. 9(3), 420–428 (2006)

    Google Scholar 

  • Han, S., Shen, H., Philipose, M., Agarwal, S., Wolman, A., Krishnamurthy, A.: Mcdnn: An approximation-based execution framework for deep stream processing under resource constraints. In: Proceedings of the 14th Annual International Conference on Mobile Systems, Applications, and Services, pp. 123–136. ACM (2016)

  • Jo, S.H., Chang, T., Ebong, I., Bhadviya, B.B., Mazumder, P., Lu, W.: Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10(4), 1297–1301 (2010)

    Google Scholar 

  • Kempter, R., Gerstner, W., Van Hemmen, J.L., Wagner, H.: Temporal coding in the sub-millisecond range: Model of barn owl auditory pathway. In: Advances in neural information processing systems, pp. 124–130 (1996)

  • Krizhevsky, A., Sutskever, I., Hinton, G.E.: Imagenet classification with deep convolutional neural networks. In: Advances in neural information processing systems, pp. 1097–1105 (2012)

  • LeCun, Y., Bengio, Y., Hinton, G.: Deep learning. Nature 521(7553), 436–444 (2015)

    Google Scholar 

  • LeCun, Y., Bottou, L., Bengio, Y., Haffner, P.: Gradient-based learning applied to document recognition. Proc. IEEE 86(11), 2278–2324 (1998)

    Google Scholar 

  • LeCun, Y., Cortes, C., Burges, C.J.: The mnist database of handwritten digits (1998)

  • Legenstein, R., Naeger, C., Maass, W.: What can a neuron learn with spike-timing-dependent plasticity? Neural Comput. 17(11), 2337–2382 (2005)

    MathSciNet  MATH  Google Scholar 

  • Liu, C., Yang, Q., Yan, B., Yang, J., Du, X., Zhu, W., Jiang, H., Wu, Q., Barnell, M., Li, H.: A memristor crossbar based computing engine optimized for high speed and accuracy. In: VLSI (ISVLSI), 2016 IEEE Computer Society Annual Symposium on, pp. 110–115. IEEE (2016)

  • Liu, T., Liu, Z., Lin, F., Jin, Y., Quan, G., Wen, W.: Mt-spike: A multilayer time-based spiking neuromorphic architecture with temporal error backpropagation. In: 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 450–457. IEEE (2017)

  • Maass, W.: On the computational power of winner-take-all. Neural Comput. 12(11), 2519–2535 (2000)

    MathSciNet  Google Scholar 

  • Neil, D., Liu, S.C.: Minitaur, an event-driven fpga-based spiking network accelerator. IEEE Trans. Very Large Scale Integr. VLSI Syst. 22(12), 2621–2628 (2014)

    Google Scholar 

  • Ponulak, F.: Resume-new supervised learning method for spiking neural networks. Institute of Control and Information Engineering, Poznan University of Technology.(Available online at: http://d1.cie.put.poznan.pl/fp/research.html) (2005)

  • Rumelhart, D.E., Hinton, G.E., Williams, R.J.: Learning internal representations by error propagation. Tech. rep, DTIC Document (1985)

    Google Scholar 

  • Rumelhart, D.E., Hinton, G.E., Williams, R.J.: Learning representations by back-propagating errors. Cognitive modeling 5(3), 1 (1988)

    MATH  Google Scholar 

  • Seo, J.s., Brezzo, B., Liu, Y., Parker, B.D., Esser, S.K., Montoye, R.K., Rajendran, B., Tierno, J.A., Chang, L., Modha, D.S., et al.: A 45nm cmos neuromorphic chip with a scalable architecture for learning in networks of spiking neurons. In: Custom Integrated Circuits Conference (CICC), 2011 IEEE, pp. 1–4. IEEE (2011)

  • Sjöström, J., Gerstner, W.: Spike-timing dependent plasticity. Spike-timing dependent plasticity p. 35 (2010)

  • Szegedy, C.: An overview of deep learning. AITP 2016, (2016)

  • Thorpe, S., Delorme, A., Van Rullen, R.: Spike-based strategies for rapid processing. Neural Netw. 14(6), 715–725 (2001)

    Google Scholar 

  • Vanhoucke, V., Senior, A., Mao, M.Z.: Improving the speed of neural networks on cpus. In: Proc. Deep Learning and Unsupervised Feature Learning NIPS Workshop, vol. 1, p. 4. Citeseer (2011)

  • Wang, Y., Tang, T., Xia, L., Li, B., Gu, P., Yang, H., Li, H., Xie, Y.: Energy efficient rram spiking neural network for real time classification. In: Proceedings of the 25th GLVLSI, pp. 189–194. ACM (2015)

  • Yu, Q., Tang, H., Tan, K.C., Li, H.: Precise-spike-driven synaptic plasticity: learning hetero-association of spatiotemporal spike patterns. PLoS One 8(11), e78318 (2013)

    Google Scholar 

  • Zhao, C., Wysocki, B.T., Thiem, C.D., McDonald, N.R., Li, J., Liu, L., Yi, Y.: Energy efficient spiking temporal encoder design for neuromorphic computing systems. IEEE Trans. Multi-Scale Comput. Syst. 2(4), 265–276 (2016)

    Google Scholar 

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Lehigh University, Bethlehem, USA

    Tao Liu & Wujie Wen

  2. Department of Electrical and Computer Engineering, Florida International University, Miami, USA

    Gang Quan

Authors
  1. Tao Liu
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  2. Gang Quan
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  3. Wujie Wen
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Correspondence to Tao Liu.

Additional information

This work is supported in part by NSF under project CNS-1423137.

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Liu, T., Quan, G. & Wen, W. FPT-spike: a flexible precise-time-dependent single-spike neuromorphic computing architecture. CCF Trans. HPC 2, 254–271 (2020). https://doi.org/10.1007/s42514-020-00037-6

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  • DOI: https://doi.org/10.1007/s42514-020-00037-6

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