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Design and Implementation of Image Sensor Data Capture Based on FPGA

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Abstract

In this paper, the system organization for image sensor data registration is devised. The system is based on the combination of components located on the System-on-Chip (SoC) device with programmable logic capabilities. The proposed system allows the developer to capture image frame information from the camera sensor and store it in the data storage for further processing. The system is supposed to be implemented based on three components (hardware processor, programmable logic, and soft processor) of the SoC that communicate with each other. The devised architectural solution is characterized by its generality, configurability, and portability. It may be adopted to work with different sensors. The parameters of the system may be configured on the level of the source code and during runtime. The proposed system architecture was implemented on the Cyclone V hardware platform. The implementation was successfully tested with the image sensor module by capturing individual frames as well as a series of frames and storing them in the memory regions and further as files.

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Data Availability

The datasets generated during and/or analyzed during the current study are available from the corresponding author on reasonable request.

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Acknowledgements

During the work on the presented paper, the development board Terasic DE10 SoC was used. The board was provided by Biakom company (Kyiv, Ukraine).

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Correspondence to Yaroslav Krainyk.

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Krainyk, Y. Design and Implementation of Image Sensor Data Capture Based on FPGA. SN COMPUT. SCI. 5, 95 (2024). https://doi.org/10.1007/s42979-023-02433-5

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