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An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

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Abstract

In recent years, radio frequency (RF) energy harvesting systems have gained significant interest as inexhaustible replacements for traditional batteries in RF identification and wireless sensor network nodes. This paper presents an ultra-low-power integrated RF energy harvesting circuit in a SMIC 65-nm standard CMOS process. The presented circuit mainly consists of an impedance-matching network, a 10-stage rectifier with order-2 threshold compensation and an ultra-low-power power manager unit (PMU). The PMU consists of a voltage sensor, a voltage limiter and a capacitor-less low-dropout regulator. In the charge mode, the power consumption of the proposed energy harvesting circuit is only 97 nA, and the RF input power can be as low as \(-\)21.4 dBm \((7.24\,\upmu \hbox {W})\). In the burst mode, the device can supply a 1.0-V DC output voltage with a maximum 10-mA load current. The simulated results demonstrate that the modified RF rectifier can obtain a maximum efficiency of 12 % with a 915-MHz RF input. The circuit can operate over a temperature range from \(-40\hbox { to }125\,^{\circ }\hbox {C}\) which exceeds the achievable temperature performance of previous RF energy harvesters in standard CMOS process.

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Acknowledgments

This work was supported by the National Natural Science Foundation of China (61376033, 61322405, and 61306044) and the National High-tech Program of China (2013AA014103).

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Correspondence to Lian-xi Liu.

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Liu, Lx., Mu, Jc., Ma, N. et al. An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process. Circuits Syst Signal Process 35, 421–441 (2016). https://doi.org/10.1007/s00034-015-0092-7

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  • DOI: https://doi.org/10.1007/s00034-015-0092-7

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