Abstract
This paper presents a digital adaptive calibration method to overcome the effect of timing mismatches in the time-interleaved analog-to-digital converter (TIADC). The structure of the channel splitting–recombining is proposed. The TIADC with M channels is divided into log2 M stages for calibration, and each stage is composed of one or more two-channel sub-systems. The Lagrange mean value difference of adjacent channels is constructed by arithmetical approximation to estimate the timing mismatch. It does not need to oversample the bandlimited input signal with an oversampling ratio. And it does not require the input signal to have significant power over its bandwidth for identification. Timing mismatches are corrected by the cascaded differentiator–multipliers. A reuse structure is developed to reduce the consumption of hardware resources. Simulation results of the four-channel TIADC show that the spurious-free dynamic range (SFDR) can be improved from 31.19 to 73.39 dB. Hardware implementation based on FPGA is also carried out, and the corrected SFDR is measured at 72.29 dB. The approach has low complexity, and the bandwidth of the input signal can reach the Nyquist bandwidth of the complete TIADC system.
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The authors declare that the data used to support the findings of this study are available from the corresponding author upon request.
Change history
19 August 2021
A Correction to this paper has been published: https://doi.org/10.1007/s00034-021-01822-6
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Acknowledgements
This work was supported in part by the National Natural Science Foundation of China under Grant 62074010 and by the Scientific Research Project of Beijing Educational Committee under Grant KM201810005022.
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Liu, S., Zhao, L., Deng, Z. et al. A Digital Adaptive Calibration Method of Timing Mismatch in TIADC Based on Adjacent Channels Lagrange Mean Value Difference. Circuits Syst Signal Process 40, 6301–6323 (2021). https://doi.org/10.1007/s00034-021-01785-8
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DOI: https://doi.org/10.1007/s00034-021-01785-8