One-write algorithms for multivalued regular and atomic registers

Abstract.

This paper presents an algorithm for implementing a k-valued regular register (the logical register) using $k(k-1)/2$ binary regular registers (the physical registers) that requires only one physical write per logical write. The same algorithm using binary atomic registers implements a k-valued atomic register. The algorithm is simple to describe and depends on properties of paths in a related graph. Two lower bounds are given on the number of registers required by one-write implementations in the regular case. The first lower bound, $2k - 1 - \lfloor \log k \rfloor$, holds for a fairly general class of algorithms. The second lower bound holds for a restricted class of implementations and implies that our algorithm is optimal for this class. Both lower bounds improve on the best previously known lower bound, which was k. The two lower bounds also hold for the atomic case under further restrictions.