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Bipartite modular multiplication with twice the bit-length of multipliers

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Abstract

This paper presents a new technique to compute 2ℓ-bit bipartite multiplications with ℓ-bit bipartite multiplication units. Low-end devices such as smartcards are usually equipped with crypto-coprocessors for accelerating the heavy computation of modular multiplications; however, security standards such as NIST and EMV have declared extending the bit length of RSA cryptosystem to resist mathematical attacks, making the multiplier quickly outdated. Therefore, the double-size techniques have been studied this decade to extend the life expectancy of such multipliers. This paper proposes new double-size techniques based on the multipliers implementing either classical or Montgomery modular multiplications, or even both simultaneously (bipartite modular multiplication), in which case one can potentially compute modular multiplications twice faster. Furthermore, in order to get a more realistic estimation than the other works, this paper considers not only the cost of the multiplication, but also the cost of the other arithmetic instructions. In our estimation, the proposal provides comparable results for classical multiplier and Montgomery multiplier, and is the only available method for the bipartite multiplier.

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References

  1. Bajard, J.-C., Didier, L.-S., Kornerup, P.: An RNS Montgomery Modular Multiplication Algorithm, Proceedings of ARITH13, pp. 234–239. IEEE Computer Society, New York (1997)

  2. Chevallier-Mames, B., Joye, M., Paillier, P.: Faster double-size modular multiplication from Euclidean multipliers. In: Proceedings of Workshop on Cryptographic Hardware and Embedded Systems (CHES’03). Lecture Notes in Computer Science, vol. 2779, pp. 214–227 (2003)

  3. National Institute for Standards and Technology (NIST). FIPS 186, Digital signature standard, 1994. http://www.itl.nist.gov/fipspubs/fip186.htm

  4. Elgamal T.: A public key cryptosystem and a signature scheme based on discrete logarithms. IEEE Trans. Inf. Theory 31(4), 469–472 (1985)

    Article  MATH  MathSciNet  Google Scholar 

  5. EMVco. EMV Issuer and Application Security Guidelines, Version 1.3, 2005, http://www.emvco.com/specifications.asp?show=4

  6. Fischer, W., Seifert, J.-P.: Increasing the bitlength of crypto-coprocessors. In: Proc. Workshop on Cryptographic Hardware and Embedded Systems (CHES’02), Lecture Notes in Computer Science, vol. 2523, pp. 71–81 (2003)

  7. Infineon Technologies AG. Security and Chipcard ICs, Evaluation Documentation, SLE66CX162PE / m1531-a24, SLE66CX80PE/ m1533-a24, Both with RSA 2048 v1.4, Security Target, 2005. http://www.commoncriteriaportal.org/public/files/epfiles/0351b.pdf

  8. Kaihara, M.E., Takagi, N.: Bipartite modular multiplication. In: Proceedings of Workshop on Cryptographic Hardware and Embedded Systems (CHES’05), Lecture Notes in Computer Science, vol. 3659, pp. 201–210 (2005)

  9. Lenstra A.K., Verheul E.R.: Selecting cryptographic key sizes. J. Cryptol. 14(4), 255–293 (2001)

    MATH  MathSciNet  Google Scholar 

  10. Montgomery P.L.: Modular multiplication without trial division. Math. Comput. 44(170), 519–521 (1985)

    Article  MATH  Google Scholar 

  11. Menezes A.J., van Oorschot P.C., Vanstone S.A.: Handbook of Applied Cryptography. CRC Press, Boca Raton (1996)

    Google Scholar 

  12. National Institute of Standards ant Technology, NIST Special Publication 800-57 DRAFT, Recommendation for KeyManagement Part 1: General (2006), http://csrc.nist.gov/CryptoToolkit/tkkeymgmt.html

  13. Naccache, D., M’Raïhi, D.: Arithmetic co-processors for public-key cryptography: The state of the art. In: CARDIS, pp. 18–20 (1996)

  14. Paillier, P.: Low-cost double-size modular exponentiation or how to stretch your cryptoprocessor. In: Public Key Cryptography. Lecture Notes in Computer Science, vol. 1560, pp. 223–234 (1999)

  15. Posch K.C., Posch R.: Modulo reduction in residue number systems. IEEE Trans. Parallel Distributed Syst. 6(5), 449–454 (1995)

    Article  MathSciNet  Google Scholar 

  16. Quisquater J.-J., Couvreur C.: Fast decipherment algorithm for rsa public-key cryptosystem. Electr. Lett. 18(21), 905–907 (1982)

    Article  Google Scholar 

  17. Renesas Technology Corp. AE45X1-C(HD65145X1) Version 02 Smartcard Security Target, Public Version, 2006. http://www.commoncriteriaportal.org/public/files/epfiles/0351b.pdf

  18. RSA Laboratories, RSA challenges, http://www.rsa.com/rsalabs

  19. Rivest R.L., Shamir A., Adelman L.M.: A method for obtaining digital signatures and public-key cryptosystems. Commun. ACM 21(2), 120–126 (1978)

    Article  MATH  Google Scholar 

  20. Yoshino, M., Okeya, K., Vuillaume, C.: Unbridle the Bit-length of a crypto-coprocessor with montgomery multiplication. In: Proceedings of the 13th Annual Workshop on Selected Areas in Cryptography (SAC’06). Lecture Notes in Computer Science vol. 4356, pp. 188–202 (2007)

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Authors and Affiliations

  1. Systems Development Laboratory, Hitachi, Ltd., 1099 Ohzenji, Asao-ku, Kawasaki, 215-0013, Japan

    Masayuki Yoshino, Katsuyuki Okeya & Camille Vuillaume

Authors
  1. Masayuki Yoshino
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  2. Katsuyuki Okeya
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  3. Camille Vuillaume
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Correspondence to Masayuki Yoshino.

Additional information

A preliminary version of this paper was presented at the 12th Australasian Conference on Information Security and Privacy, ACISP’07.

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Yoshino, M., Okeya, K. & Vuillaume, C. Bipartite modular multiplication with twice the bit-length of multipliers. Int. J. Inf. Secur. 8, 13–23 (2009). https://doi.org/10.1007/s10207-008-0060-3

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  • DOI: https://doi.org/10.1007/s10207-008-0060-3

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