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An effective state-based predictive approach for leakage energy management on embedded systems

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Abstract

Energy optimization is very important for portable and battery-driven embedded systems. With the shrinking of transistor sizes, reducing leakage power becomes a significant issue. In this paper, we propose a novel prediction approach to predict idleness of functional units for leakage energy management. Using a state-based predictor, historical utilization information of functional units (FUs) is exploited to adjust the state of the predictor so as to enhance the accuracy of prediction; based on it, the idleness of the FUs are predicted and utilized for leakage reduction by applying power gating. We design two prediction algorithms, the prediction with fixed threshold (PFT) and the prediction with dynamic threshold (PDT), respectively. We implement our algorithms based on SimpleScalar and conduct experiments with a suite of fourteen benchmarks from Trimaran. The experimental results show that our algorithms achieve better results compared with the previous work.

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References

  1. Abdollahi A, Fallah F, Pedram M (2002) Minimizing leakage current in VLSI circuits. Technical Report, Department of Electrical Engineering, University of Southern California, No. 02-08, May 2002

  2. Abdollahi A, Fallah F, Pedram M (2002) Runtime mechanisms for leakage current reduction in CMOS VLSI circuits. In: Proc international symposium on low power electronics and design, August 2002

  3. Agarwal K, Deogun H, Sylvester D, Nowka K (2006) Power gating with multiple sleep modes. In: 7th international symposium on quality electronic design, 27–29 March, 2006, p 5

  4. Babighian P, Benini L, Macii A, Macii E (2004) Post-layout leakage power minimization based on distributed sleep transistor insertion. In: Proceedings of the 2004 international symposium on low power electronics and design, Aug 2004, pp 138–143

  5. Benini L, Bogliolo A, Paleologo GA, De Micheli G (1999) Policy optimization for dynamic power management. IEEE Trans Comput-Aided Des Integr Circ Syst 18(6)

  6. Chang C, Yang W, Huang C, Chien C (2007) New power gating structure with low voltage fluctuations by bulk controller in transition mode. In: IEEE international symposium on circuits and systems, 27–30 May, 2007, pp 3740–3743

  7. Chen J-J, Kuo T-W (2005) Voltage-scaling scheduling for periodic real-time tasks in reward maximization. In: 26th IEEE real-time systems symposium (RTSS)

  8. Chen J-J, Kuo T-W (2006) Procrastination for leakage-aware rate-monotonic scheduling on a dynamic voltage scalingprocessor. In: 2006 ACM SIGPLAN/SIGBED conference on language, compilers and tool support for embedded systems, pp 153–162

  9. Chen J-J, Kuo T-W (2006) Allocation cost minimization for periodic hard real-time tasks in energy-constrained dvs systems. In: Proceedings of the 2006 IEEE/ACM international conference on computer-aided design, pp 255–260

  10. Chung E-Y, Benini L, Bogliolo A, Lu Y-H, De Micheli G (2002) Dynamic power management for nonstationary service requests. IEEE Trans Comput 51(11)

  11. Devgan A, Narendra S, Blaauw D, Najm F (2003) Leakage issues in IC design: trends, estimation and avoidance. In: Proceedings of ICCAD

  12. Dropsho SG, Kursun V, Albonesi DH, Dwarkadas S, Friedman EG (2002) Managing static leakage energy in microprocessor functional units. In: Micro-annual workshop then annual international symposium, vol 35, pp 321–332

  13. Gniady C, Butt AR, Hu YC, Lu Y-H (2006) Program counter-based prediction techniques for dynamic power management. IEEE Trans Comput 55(6):641–658

    Article  Google Scholar 

  14. Hennessy JL, Patterson DA (1996) Computer architecture: a quantitative approach, 2nd edn. Morgan Kaufmann, San Mateo

    MATH  Google Scholar 

  15. Hu Z, Buyuktosunoglu A, Srinivasan V, Zyuban V, Jacobson H, Bose P (2004) Microarchitectural techniques for power gating of execution units. In: Proceedings of the international symposium on low power electronics and design, pp 32–37

  16. http://www.trimaran.org/

  17. http://www.simplescalar.com/

  18. Johnson MC, Somasekhar D, Roy K (1999) Leakage control with efficient use of transistor stacks in single threshold CMOS. In: Design automation conference, Proceedings 36th, 21–25 June 1999, pp 442–445

  19. Kao JT, Chandrakasan AP (2000) Dual-threshold voltage techniques for low-power digital circuits. IJSSC 35(7):1009–1018

    Google Scholar 

  20. Kao J, Chandrakasan A (2000) Dual-threshold voltage techniques for low-poer digital circuits. IEEE J Solid-State Circ 35:1009–1018

    Article  Google Scholar 

  21. Keshavarzi A, Ma S, Narendra S, Bloechel B, Mistry K, Ghani T, Borkar S, De V (2001) Effectiveness of reverse body bias for leakage control in scaled dual-Vt CMOS ICs. In: Proc int symp low power electronics and design. Huntington Beach, CA, pp 207–212

  22. Kong F, Tao P, Yang S, Zhao X (2006) Genetic algorithm based idle length prediction scheme for dynamic power management. In: IMACS multiconference on computational engineering in systems applications, Oct 2006, pp 1437–1443

  23. Krishnamurthy R, Alvandpour A, De V, Borkar S (2002) High-performance and low-power challenges for sub-70-nm microprocessor circuits. In: Proc custom integrated circuits conf, pp 125–128

  24. Kursun V, Friedman EG (2002) Low swing dual threshold voltage domino logic. In: 12th great lakes symposium on VLSI, April 2002

  25. Luo J, Jha NK (2007) Power-efficient scheduling for heterogeneous distributed real-time embedded systems. IEEE Trans Comput-Aided Des 26:1161–1170

    Article  Google Scholar 

  26. Luo J, Jha NK, Peh L-S (2007) Simultaneous dynamic voltage scaling of processors and communication links in real-time distributed embedded systems. IEEE Trans VLSI Syst 15:427–437

    Article  Google Scholar 

  27. Mutoh S, Douseki T, Matsuya Y, Aoki T, Shigematsu S, Yamada J (1995) 1-V power supply high-speed digital circuit technology with multithreshold voltage CMOS. IEEE J Solid-State Circ 30:847–854

    Article  Google Scholar 

  28. Narendra S, Borkar S, De V, Antoniadis D, Chandrakasan A (2001) Scaling of stack effect and its application for leakage reduction. In: Proc int symp low power electronic design (ISLPED), pp 195–200

  29. Pan L, Yang Y, Wang M, Shao Z (2008) A state-based predictive approach for leakage reduction of functional units. In: IEEE/IFIP international conference on embedded and ubiquitous computing, Dec 2008, pp 52–58

  30. Park JC, Mooney VJ III (2006) Sleepy stack leakage reduction. IEEE Trans Very Large Scale Integr (VLSI) Syst 14(11)

  31. Raghavan SV, Swaminathan N, Srinivasan J (1999) Predicting behavior patterns using adaptive workload models. In: 7th international symposium on modeling, analysis and simulation of computer and telecommunication systems, 24–28 Oct 1999, pp 226–233

  32. Rele S, Pande S, Onder S, Gupta R (2002) In: Optimizing static power dissipation by functional units in superscalar processors. Lecture notes in computer science, vol 2304. Springer, Berlin, pp 261–276

    Google Scholar 

  33. Roy K, Mukhopadhyay S, Mahmoodi-Meimand H (2003) Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits. Proc IEEE 91(2):305–327

    Article  Google Scholar 

  34. Simunic T, Benini L, Glynn P, De Micheli G (2000) Dynamic power management for portable systems. In: International conference of mobile computing and networking. ACM Press, New York

    Google Scholar 

  35. Swaminathan N, Srinivasan J, Raghavan SV (1999) Bandwidth-demand prediction in ATM networks using genetic algorithms. Comput Commun 22:1127–1135

    Article  Google Scholar 

  36. Takayanagi T, Shin JL, Petrick B, Su JY, Levy H, Pham H, Son J, Moon N, Bistry D, Nair U, Singh M, Mathur V, Leon AS (2005) A dual-core 64-bit UltraSPARC microprocessor for dense server applications. IEEE J Solid-State Circ 40(1):7–18

    Article  Google Scholar 

  37. Tschanz J, Ye Y, Wei L, Govindarajulu V, Borkar N, Burns S, Karnik T, Borkar S, De V (2002) Design optimizations of a high-performance microprocessor using combinations of dual-Vt allocation and transistor sizing. In: Symp VLSI circuits dig tech papers, pp 218–219

  38. Tschanz JW, Narendra SG, Ye Y, Bloechel BA, Borkar S, De V (2003) Dynamic sleep transistor and body bias for active leakage power control of microprocessors. IEEE J Solid-State Circ 38(11)

  39. Wei L, Chen Z, Johnson MC, Roy K, De V (1998) Design and optimization of low voltage high performance dual threshold CMOS circuits. In: ACM/IEEE design automation conf, pp 489–494

  40. Wei L, Roy K, Ye Y, De V (1999) Mixed-Vth (MVT) CMOS circuit design methodology for low power applications. In: ACM/IEEE design automation conf, pp 430–435

  41. Wei L, Roy K, Vivek KD (2000) Low voltage low power CMOS design techniques for deep submicron ICs. In: Proceedings of the international conference on VLSI design, pp 24–29

  42. Ye Y, Borkar S, De V (1998) A new technique for standby leakage reduction in high-performance circuits. In: Symp VLSI circuits dig tech papers, pp 40–41

  43. Youssef A, Anis M, Elmasry M (2006) Dynamic standby prediction for leakage tolerant microprocessor functional units. IEEE Computer Society, Washington, pp 371–384

  44. Zhong X, Xu CZ (2005) Energy-aware modeling and scheduling of real-time tasks for dynamic voltage scaling. In: Proc of IEEE real-time symposium (RTSS’05), pp 366–375

  45. Zhong X, Xu C-Z (2006) System-wide energy minimization for real-time tasks: lower bound and approximation. In: IEEE/ACM international conference on computer-aided design (ICCAD), pp 516–521

  46. Zhou D, Hu J, Wang L (2007) Design of adiabatic sequential circuits using power-gating technique. IEEE northeast workshop on circuits and systems, 5–8 Aug 2007, pp 952–955

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Correspondence to Zili Shao.

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This version is a revised version. A preliminary version of this work appears in the Proceedings of the 2008 IEEE/IFIP International Conference On Embedded and Ubiquitous Computing (EUC 2008) [29]. The work described in this paper is partially supported by the grants from the Research Grants Council of the Hong Kong Special Administrative Region, China (GRF POLYU 5260/07E) and HK PolyU 1-ZV5S, National 863 Program of China (Grant No. 2006AA01Z172 and Grant No. 2008AA01Z106), National Natural Science Foundation of China (Grant No. 60533040), and National Science Fund for Distinguished Young Scholars (Grant No. 60725208).

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Guo, M., Pan, L., Yang, Y. et al. An effective state-based predictive approach for leakage energy management on embedded systems. Des Autom Embed Syst 13, 311–332 (2009). https://doi.org/10.1007/s10617-009-9047-1

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