Skip to main content
SpringerLink
Log in

Achieving Structural and Composable Modeling of Complex Systems

  • Published:
International Journal of Parallel Programming Aims and scope Submit manuscript

Abstract

This paper describes a recently released, structural and composable modeling system called the Liberty Simulation Environment (LSE). LSE automatically constructs simulators from system descriptions that closely resemble the structure of hardware at the chosen level of abstraction. Component-based reuse features allow an extremely diverse range of complex models to be built easily from a core set of component libraries. This paper also describes the makeup and initial experience with a set of such libraries currently undergoing refinement. With LSE and these soon-to-be-released component libraries, students will be able to learn about systems in a more intuitive fashion, researchers will be able to collaborate with each other more easily, and developers will be able to rapidly and meaningfully explore novel design candidates.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

Reference

  1. Desikan.R., Burger.D., Keckler S.W. (July 2001). Measuring Experimental Error in Microprocessor Simulation, Proceedings of the 28th International Symposium on Computer Architecture.

  2. Cain H.W., Lepak K.M., Schwartz B.A., Lipasti M.H. (February 2002). Precise and Accurate Processor Simulation, Proceedings of the Fifth Workshop on Computer Architecture Evaluation using Commercial Workloads.

  3. Gibson.J., Kunz.R., Ofelt.D., Horowitz M., Hennessy.J., and Heinrich.M. (November 2000). FLASH vs. (Simulated) FLASH: Closing the Simulation Loop, Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). pp. 49–58.

  4. Pai V.S., Ranganathan.P., Adve S.V. (August 1997). RSIM Reference Manual, Version 1.0. Electrical and Computer Engineering Department, Rice Univ ersity, technical Report 9705.

  5. C.J. Hughes V.S. Pai P. Ranganathan S.V. Adve (February 2002) ArticleTitleRsim: Simulating Shared-Memory Multiprocessors with ILP Processors IEEE Computer. 35 IssueID2 40–49

    Google Scholar 

  6. Burger D., Austin T.M. (June 1997). The SimpleScalar Tool Set Version 2.0. Technical Report 97-1342, Department of Computer Science, University of Wisconsin-Madison.

  7. Önder S., Gupta R. (May 1998). Automatic Generation of Microarchitecture Simulators, Proceedings of the IEEE International Conference on Computer Languages. pp. 80–89.

  8. Pees.S., Hoffmann.A., Živojnović V., Meyr.H. (1999). LISA - Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures, Proceedings of the ACM/IEEE Design Automation Conference (DAC). pp. 933–938

  9. Siska.C. (December 1998). A Processor Description Language Supporting Retargetable Multi-Pipeline DSP Program Development Tools, Proceedings of the 11th International Symposium on System Synthesis (ISSS).

  10. Halambi.A., Grun.P., Ganesh.V., Khare.A., Dutt.N., Nicolau.A. (March 1999). EXPRESSION: A Language for Architecture Exploration Through Compiler/Simulator Retargetability, Proceedings of the European Conference on Design, Automation and Test (DATE).

  11. J. Buck S. Ha E.A. Lee D.G. Messerschmitt (1994) ArticleTitlePtolemy: A Framework for Simulating and Prototyping Heterogeneous Systems International Journal in Computer Simulation 4 155–182

    Google Scholar 

  12. Open SystemC Initiative (OSCI). (2001). Functional Specification for SystemC 2.0, URL http: //www.systemc.org,http://www.systemc.org.

  13. J. Emer P. Ahuja E. Borch A. Klauser C.-K. Luk S. Manne S.S. Mukherjee H. Patil S. Wallace N. Binkert R. Espasa T. Juan (February 2002) ArticleTitleAsim: A Performance Model Framework IEEE Computer. 0018-9162 68–76

    Google Scholar 

  14. Mishra P., Dutt N., Nicolau A. (October 2001). Functional Abstraction Driven Design Space Exploration of Heterogeneous Programmable Architectures, Proceedings of the International Symposium on System Synthesis (ISSS). pp. 256–261, URL citeseer.nj.nec.com/506348.html.

  15. Vachharajani M., Vachharajani N., Penry D.A., Blome J.A., August D.I. (November 2002). Microarchitectural Exploration with Liberty, Proceedings of the 35th International Symposium on Microarchitecture. pp. 271–282.

  16. M. Vachharajani (November 2004) Microarchitectural Modeling for Design-space Exploration. Ph.D. thesis Department of Electrical Engineering, Princeton University Princeton, NJ USA

    Google Scholar 

  17. Wang H.-S., Zhu X., Peh L.-S., Malik S. (November 2002). Orion: A Power-Performance Simulator of Interconnection Networks, Proceedings of the 35th International Symposium on Microarchitecture.

  18. Murthy P. (1997) Modeling and Design of Reactive Systems, presentation. URL: http://ptolemy.eecs.berkeley.edu/presentations/97/rasspfinal.pdf.

  19. Lee E.A., Sangiovanni-Vincentelli A. (1996). Comparing Models of Computation, Proceedings of ICCAD.

  20. A. Girault B. Lee E.A. Lee (June 1999) ArticleTitleHierarchical Finite State Machines with Multiple Concurrency Models IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 18 IssueID6 742–760

    Google Scholar 

  21. Penry D., August D.I. (June 2003). Optimizations for a Simulator Construction System Supporting Reusable Components, Proceedings of the 40th Design Automation Conference.

  22. Eisley N., Peh L.-S. (September 2004). High-Level Power Analysis of On-Chip Netowrks, Proceedings of 7th International Conference on Compilers, Architectures and Synthesis for Embedded Systems.

  23. Beckmann B.M., Wood D. (December 2003). Transmission Line Caches, Proceedings of the International Symposium on Microarchitecture. pp. 43-55.

  24. Ye T.T., Benini L., Micheli G.D. (March 2003). Packetized On-Chip Interconnect Communication Analysis for MPSoC, Proceedings of Design Automation and Test in Europe. pp. 344–349.

  25. Wang H.-S., Peh L.-S., Malik.S. (February 2003). High-Level Power Analysis of On-Chip Netowrks, In IEEE Micro, Vol. 24, No. 1, (Best of Hot Interconnects 10).

  26. Chen X., Peh L.-S., (August 2003). Leakage Power Modeling and Optimization of Interconnection Networks, Proceedings of the International Symposium on Low Power and Energy Design. pp. 90–95.

  27. Shang L., Peh L.-S., Kumar A., Jha N.K. (December 2004). Thermal Modeling, Characterization and Optimization of On-Chip Networks, Proceedings of the 37th International Symposium on Microarchitecture.

  28. Sorin D.J., Pai V.S., Adve S.V., Vernon M.K., Wood D.A. (June 1998). Analytic Evaluation of Shared-Memory Systems with ILP Processors, Proceedings of the 25th Annual International Symposium on Computer Architecture. pp. 380–391.

  29. Crowley P., Fiuczynski M., Baer J.-L., Bershad B., (May 2000). Characterizing Processor Architectures for Programmable Network Interfaces, Proceedings of the 14th International Conference on Supercomputing. pp. 54–65.

  30. Mackenzie K., Shi W., McDonald A., Ganev I. (2003). An Intel IXP1200-based Network Interface, Proceedings of the Second Workshop on Novel Uses of System Area Networks (SAN-2).

  31. Willmann P., Brogioli M., Pai V.S. (July 2004). Spinach: A Liberty-based Simulator for Programmable Network Interface Architectures, Proceedings of the ACM SIG-PLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems. pp. 20–29, ACM Press.

  32. Alteon Networks. (August 1997). Tigon/PCI Ethernet Controller, revision 1.04.

  33. Alteon WebSysterns. (July 1999). Gigabit Ethernet/PCI Network Interface Card: Host/NIC Software Interface Definition, revision 12.4.13.

Download references

Author information

Authors and Affiliations

  1. Department of Computer Science, Princeton University, 35 Olden St., 08544, Princeton, NJ, USA

    David I. August

  2. Department of Electrical Engineering, Engineering Quadrangle, Princeton University, 08544, Princeton, NJ, USA

    Sharad Malik & Li-Shiuan Peh

  3. School of Electrical and Computer Engineering, Purdue University, Electrical Engineering Building, 465 Northwestern Avenue, 47907-2035, West Lafayette, IN, USA

    Vijay Pai

  4. Department of Electrical and Computer Engineering, University of Colorado, 425 UCB, 80309-0425, Boulder, CO, USA

    Manish Vachharajani

  5. Department of Electrical and Computer Engineering, MS 366, Rice University, 6100 Main Street, 77005, Houston, TX, USA

    Paul Willmann

Authors
  1. David I. August
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Sharad Malik
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Li-Shiuan Peh
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Vijay Pai
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Manish Vachharajani
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Paul Willmann
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to David I. August.

Rights and permissions

Reprints and permissions

About this article

Cite this article

August, D.I., Malik, S., Peh, LS. et al. Achieving Structural and Composable Modeling of Complex Systems. Int J Parallel Prog 33, 81–101 (2005). https://doi.org/10.1007/s10766-005-3569-3

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10766-005-3569-3

Keywords

Search

Navigation