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SMA: A Self-Monitored Adaptive Cache Warm-Up Scheme for Microprocessor Simulation

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Abstract

This paper presents an adaptive technique for warming up caches in sampled microprocessor simulation. The simulator monitors the warm-up process of the caches and decides when the caches are warmed up based on simple heuristics. This mechanism allows the warm up length to be adaptive to cache sizes and benchmark variability characteristics. With only half or one-third of the average warm-up length of previous methods, the proposed Self-Monitored Adaptive (SMA) warm-up technique achieves CPI results very similar to previous methods. On average SMA exhibits only 0.2% warm-up error in CPI. For simulating small caches, the SMA technique can reduce the warm-up overhead by an order of magnitude compared to previous techniques. Finally, SMA gives the user some indicator of warm-up error at the end of the cycle-accurate simulation that helps the user to gauge the accuracy of the warm-up.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, 78712, TX, USA

    Yue Luo & Lizy K. John

  2. Department of Electronics and Information Systems, Ghent University, Sint- Pietersnieuwstraat 41, B-9000 Gent, Belgium

    Lieven Eeckhout

Authors
  1. Yue Luo
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  2. Lizy K. John
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  3. Lieven Eeckhout
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Correspondence to Yue Luo.

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Luo, Y., John, L.K. & Eeckhout, L. SMA: A Self-Monitored Adaptive Cache Warm-Up Scheme for Microprocessor Simulation. Int J Parallel Prog 33, 561–581 (2005). https://doi.org/10.1007/s10766-005-7305-9

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  • DOI: https://doi.org/10.1007/s10766-005-7305-9

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