Abstract
This paper describes methods to adapt existing optimizing compilers for sequential languages to produce code for parallel processors. In particular it looks at targeting data-parallel processors using SIMD (single instruction multiple data) or vector processors where users need features similar to high-level control flow across the data-parallelism. The premise of the paper is that we do not want to write an optimizing compiler from scratch. Rather, a method is described that allows a developer to take an existing compiler for a sequential language and modify it to handle SIMD extensions. As well as modifying the front-end, the intermediate representation and the code generation to handle the parallelism, specific optimizations are described to target the architecture efficiently.
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Gaster, B.R., Bainbridge, T., Lacey, D. et al. Compilation Techniques for High Level Parallel Code. Int J Parallel Prog 38, 4–18 (2010). https://doi.org/10.1007/s10766-009-0118-5
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DOI: https://doi.org/10.1007/s10766-009-0118-5