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Circuit and Latch Capable of Masking Soft Errors with Schmitt Trigger

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Abstract

In VLSIs, soft errors resulting from radiation-induced transient pulses frequently occur. In recent high-density and low-power VLSIs, the operation of systems is seriously affected by not only soft errors occurring on memory systems and the latches of logic circuits but also those occurring on the combinational parts of logic circuits. The existing tolerant methods for soft errors on the combinational parts do not provide enough high tolerant capability with small performance penalty. This paper proposes a class of soft error masking circuits by using a Schmitt trigger circuit and a pass transistor. The paper also presents a construction of soft error masking latches (SEM-latches) capable of masking transient pulses occurring on combinational circuits. Moreover, simulation results show that the proposed method has higher soft error tolerant capability than the existing methods. For supply voltage V DD  = 3.3 V, the proposed method is capable of masking transient pulses of magnitude 4.0 V or less.

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Acknowledgment

The authors gratefully thank the anonymous reviewers whose comments have improved the quality of this paper. This work is supported by VLSI Design and Education Center(VDEC), the University of Tokyo in collaboration with Synopsys, Inc. and Cadence Design Systems, Inc.

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Authors and Affiliations

  1. Graduate School of Science and Technology, Chiba University, 1-33 Yayoi-cho, Inage-ku, Chiba, 263–8522, Japan

    Yoichi Sasaki

  2. Graduate School of Advanced Integration Science, Chiba University, 1-33 Yayoi-cho, Inage-ku, Chiba, 263–8522, Japan

    Kazuteru Namba & Hideo Ito

Authors
  1. Yoichi Sasaki
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  2. Kazuteru Namba
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  3. Hideo Ito
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Corresponding author

Correspondence to Kazuteru Namba.

Additional information

Responsible Editor: N. A. Touba

The earlier version of this paper was presented at the 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT’06).

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Sasaki, Y., Namba, K. & Ito, H. Circuit and Latch Capable of Masking Soft Errors with Schmitt Trigger. J Electron Test 24, 11–19 (2008). https://doi.org/10.1007/s10836-007-5034-2

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  • DOI: https://doi.org/10.1007/s10836-007-5034-2

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