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Applying Petri Nets to Modeling of Many-Core Processor Self-Testing when Tests are Performed Randomly

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Abstract

Today’s many-core processors are manufactured in inherently unreliable technologies. Massively defective technologies used for production of many-core processors are the direct consequence of the feature size shrinkage in today’s CMOS (complementary metal-oxide-semiconductor) technology. Due to these reliability problems, fault-tolerance of many-core processors becomes one of the major challenges. To reduce the probability of failures of many-core processors various fault tolerance techniques can be applied. The most preferable and promising techniques are the ones that can be easily implemented and have minimal cost while providing high level of processor fault tolerance. One of the promising techniques for detection of faulty cores, and consequently, for performing the first step in providing many-core processor fault tolerance is mutual testing among processor cores. Mutual testing can be performed either in a random manner or according to a deterministic scheduling policy. In the paper we deal with random execution of mutual tests. Effectiveness of such testing can be evaluated through its modeling. In the paper, we have shown how Stochastic Petri Nets can be used for this purpose and have obtained some results that can be useful for developing and implementation of testing procedure in many-core processors.

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Acknowledgments

The authors would like to thank SHARPE developer Prof. Kishor Trivedi for his kindly help and recommendations which facilitated preparing of this paper.

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Authors and Affiliations

  1. Department of informatics, Faculty of Science, University J.E.Purkine, Usti nad Labem, Czech Republic

    Viktor Mashkov, Jiri Barilla & Pavel Simr

Authors
  1. Viktor Mashkov
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  2. Jiri Barilla
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  3. Pavel Simr
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Corresponding author

Correspondence to Viktor Mashkov.

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Responsible Editor: D. Gizopoulos

Appendix

Appendix

Table 1 Denotations and meanings of the places, transitions and inhibitors
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Table 2 N = 4, Rate 3 = 50
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Table 3 N = 5, Rate 3 = 50
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Table 4 N = 6, Rate 3 = 50
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Table 5 N = 7, Rate 3 = 50
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Table 6 N = 8, Rate 3 = 50
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Mashkov, V., Barilla, J. & Simr, P. Applying Petri Nets to Modeling of Many-Core Processor Self-Testing when Tests are Performed Randomly. J Electron Test 29, 25–34 (2013). https://doi.org/10.1007/s10836-012-5346-8

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  • DOI: https://doi.org/10.1007/s10836-012-5346-8

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