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Research on the Efficiency Improvement of Design for Testability Using Test Point Allocation

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Abstract

Traditional design for testability (DFT) is arduous and time-consuming because of the iterative process of testability assessment and design modification. To improve the DFT efficiency, a DFT process based on test point allocation is proposed. In this process, the set of optimal test points will be automatically allocated according to the signal reachability under the constraints of testability criteria. Thus, the iterative DFT process will be completed by computer and the test engineers will be released to concentrate on the system design rather than the repetitive modification process. To perform test point allocation, the dependency matrix of signal to potential test point (SP-matrix) is defined based on multi-signal flow graph. Then, genetic algorithm (GA) is adopted to search for the optimal test point allocation solution based on the SP-matrix. At last, experiment is carried out to evaluate the effectiveness of the algorithm.

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Authors and Affiliations

  1. School of Instrumentation Science & Opto-electronics Engineering, Beihang University, Beijing, China

    Guohua Wang, Qiang Li & Xiaofeng Meng

  2. College of Electrical and Electronic Engineering, North China Electric Power University, Beijing, China

    Xiaomei Chen

Authors
  1. Guohua Wang
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  2. Qiang Li
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  3. Xiaomei Chen
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  4. Xiaofeng Meng
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Corresponding author

Correspondence to Guohua Wang.

Additional information

Responsible Editor: S. T. Chakradhar

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Wang, G., Li, Q., Chen, X. et al. Research on the Efficiency Improvement of Design for Testability Using Test Point Allocation. J Electron Test 30, 371–376 (2014). https://doi.org/10.1007/s10836-014-5450-z

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  • DOI: https://doi.org/10.1007/s10836-014-5450-z

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