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Stochastic allocation and scheduling for conditional task graphs in multi-processor systems-on-chip

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Abstract

Embedded systems designers are turning to multicore architectures to satisfy the ever-growing computational needs of applications within a reasonable power envelope. One of the most daunting challenges for MultiProcessor System-on-Chip (MPSoC) platforms is the development of tools for efficient mapping multi-task applications onto hardware platforms. Software mapping can be formulated as an optimal allocation and scheduling problem, where the application is modeled as a task graph, the target hardware is modeled as a set of heterogeneous resources, and the objective function represents a design goal α (e.g. minimum execution time, minimum usage of communication resources, etc.). Conditional task graphs, where inter-task edges represent data as well as control dependencies, are a well-known computational model to describe complex real-life applications where alternative execution paths, guarded by conditionals, can be specified. Each condition has a probability associated with each possible outcome.

Mapping conditional task graphs is significantly more challenging than mapping pure data-flow graphs (where edges only represent data dependencies). Approaches based on general-purpose complete solvers (e.g. Integer Linear Programming solvers) are limited both by computational blowup and by the fact that the objective is a stochastic functional. The main contribution of our work is an efficient and complete approach to allocation and scheduling of conditional task graphs, based on (i) an exact analytic formulation of the stochastic objective function exploiting task graph analysis and (ii) an extension of the timetable constraint for conditional activities. Moreover, our solver is integrated in a complete application development environment which produces executable code for target multicore platforms. This integrated framework allows us to validate modeling assumptions and to assess constraint satisfaction and objective function optimization. Extensive validation results demonstrate not only that our approach can handle non-trivial instances efficiently, but also that our models are accurate and lead to optimal and highly predictable execution.

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Authors and Affiliations

  1. DEIS Universita’ di Bologna, Viale del Risorgimento 2, 40136, Bologna, Italy

    Michele Lombardi, Michela Milano, Martino Ruggiero & Luca Benini

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  1. Michele Lombardi
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  2. Michela Milano
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  3. Martino Ruggiero
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  4. Luca Benini
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Correspondence to Michele Lombardi.

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Lombardi, M., Milano, M., Ruggiero, M. et al. Stochastic allocation and scheduling for conditional task graphs in multi-processor systems-on-chip. J Sched 13, 315–345 (2010). https://doi.org/10.1007/s10951-010-0184-y

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