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Design of a high-efficient MSD adder

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Abstract

Carry propagation delay is a big obstacle to improve the addition efficiency in computer system. And the more data bits the operands have, the delay is more serious. As data bits of operand in optical computer can be huge this makes carry delay be very serious. How to decrease or even mitigate carry delay in addition is very important to promote optical computer in numerical computing applications. To improve the addition efficiency, a new method to design and implement optical adder is put forward. Fully considering the relations between the addend and augend based on modified signed-digit (MSD) number system operands, division algorithm is presented. It makes the design and implementation of the adder much easy and feasible. Besides, it also guarantees that no carry delay is introduced in the process of addition. Meanwhile, the architecture of the adder, its implementation as well as the auxiliary electronic circuit are also presented. Experimental results show that the architecture and design of the new MSD adder are correct. It can avoid carry propagation and is much efficient for optical addition operation.

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Acknowledgments

The authors really appreciate the pertinent and helpful remarks, comments, and suggestions from the reviewers which lead to the improvement of the paper. This work is supported by National Science Foundation of China (No. 61103054 and No. 61073049), Guangxi Natural Science Foundation (2013GXNSFAA019349), and Science and Technology Committee of Baoshan at Shanghai (No. 12-B-16).

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Authors and Affiliations

  1. School of Computer Engineering and Science, Shanghai University, No. 333 Nanchen Rd., Shanghai, 200444, China

    Junjie Peng, Rong Shen & Xianshun Ping

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  1. Junjie Peng
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  2. Rong Shen
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  3. Xianshun Ping
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Correspondence to Junjie Peng.

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Peng, J., Shen, R. & Ping, X. Design of a high-efficient MSD adder. J Supercomput 72, 1770–1784 (2016). https://doi.org/10.1007/s11227-015-1484-y

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  • DOI: https://doi.org/10.1007/s11227-015-1484-y

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