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The Architecture and Development Flow of the S5 Software Configurable Processor

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Abstract

A software configurable processor (SCP) is a hybrid device that couples a conventional processor datapath with programmable logic to allow application programs to dynamically customize the instruction set. SCP architectures can offer significant performance gains by exploiting data parallelism, operator specialization and deep pipelines. The S5000 is a family of high performance software configurable processors for embedded applications. The S5000 consists of a conventional 32-bit RISC processor coupled with a programmable Instruction Set Extension Fabric (ISEF). To develop an application for the S5 the programmer identifies critical sections to be accelerated, writes one or more extension instructions as functions in a variant of the C programming language, and accesses those functions from the application program. Performance gains of more than an order of magnitude over the unaccelerated processor can be achieved.

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Acknowledgements

The S5 architecture is the product of the efforts of many people. I would especially like to thank the rest of the Stretch Architecture team: Gary Banta, Ricardo Gonzalez, Scott Johnson, Charle’ Rupp, Albert Wang, and Mark Williams.

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Authors and Affiliations

  1. Stretch, Inc., 1322 Orleans Drive, Sunnyvale, CA, USA

    Jeffrey M. Arnold

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  1. Jeffrey M. Arnold
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Correspondence to Jeffrey M. Arnold.

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Arnold, J.M. The Architecture and Development Flow of the S5 Software Configurable Processor. J VLSI Sign Process Syst Sign Image Video Technol 47, 3–14 (2007). https://doi.org/10.1007/s11265-006-0012-y

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