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Towards Generic Embedded Multiprocessing for RVC-CAL Dataflow Programs

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Abstract

Dataflow languages enable describing signal processing applications in a platform independent fashion, which makes them attractive in today’s multiprocessing era. RVC-CAL is a dynamic dataflow language that enables describing complex data-dependent programs such as video decoders. To this date, design automation toolchains for RVC-CAL have enabled creating workstation software, dedicated hardware and embedded application specific multiprocessor implementations out of RVC-CAL programs. However, no solution has been presented for executing RVC-CAL applications on generic embedded multiprocessing platforms. This paper presents a dataflow-based multiprocessor communication model, an architecture prototype that uses it and an automated toolchain for instantiating such a platform and the software for it. The complexity of the platform increases linearly as the number of processors is increased. The experiments in this paper use several instances of the proposed platform, with different numbers of processors. An MPEG-4 video decoder is mapped to the platform and executed on it. Benchmarks are performed on an FPGA board.

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  1. http://orcc.sourceforge.net/

References

  1. Janneck, J. W., Mattavelli, M., Raulet, M., & Wipliez, M. (2010). Reconfigurable video coding: a stream programming approach to the specification of new video coding standards. Proc. ACM Multimedia Systems 2010, 223–234.

  2. Boutellier, J., Silvén, O., & Raulet, M. (2011). Automatic synthesis of TTA processor networks from RVC-CAL dataflow programs. Proc. 2011 IEEE Workshop on Signal Processing Systems, 25–30.

  3. Lee, E. A., & Messerschmitt, D. G. (1987). Synchronous data flow. Proceedings of the IEEE, 75(9), 1235–1245.

    Article  Google Scholar 

  4. Yviquel, H., Casseau, E., Wipliez, M., & Raulet, M. (2011) Efficient multicore scheduling of dataflow process networks. Proc. 2011 IEEE Workshop on Signal Processing Systems, 198–203.

  5. Patel, A., & Kapoor, H. K. (2010) Exploring use of NoC for reconfigurable video coding. Proc. 23rd International Conference on VLSI Design, 134–139.

  6. Dennis, J. B., & Misunas, D. P. (1974). A preliminary architecture for a basic data-flow processor. ACM SIGARCH Computer Architecture News, 3(4), 126–132.

    Article  Google Scholar 

  7. Corporaal, H. (1997). Microprocessor architectures: From VLIW to TTA. New York: Wiley.

    Google Scholar 

  8. Esko, O., Jääskelainen, P., Huerta, P., de La Lama, C. S., Takala, J., & Martinez, J. I. (2010). Customized exposed datapath soft-core design flow with compiler support. Proc. 2010 International Conference on Field Programmable Logic and Applications, 217–222.

  9. Janneck, J. W., Miller, I. D., Parlour, D. B., Roquier, G., Wipliez, M., & Raulet, M. (2009). Synthesizing hardware from dataflow programs: an MPEG-4 simple profile decoder case study. Journal of Signal Processing Systems, 63(2), 241–249.

    Article  Google Scholar 

  10. Boutellier, J., Lundbom, I., Janhunen, J., Ylimäinen, J., & Hannuksela, J. (2012). Application-specific instruction processor for extracting local binary patterns. Proc. 2011 Conference on Design & Architectures for Signal and Image Processing, 82–89.

  11. Boutellier, J., Raulet, M., & Silvén, O. (2012). Automatic hierarchical discovery of quasi-static schedules of RVC-CAL dataflow programs. Journal of Signal Processing Systems. doi:10.1007/s11265-012-0676-4.

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Acknowledgements

This work was funded by the DORADO project of Academy of Finland.

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Authors and Affiliations

  1. Department of Computer Science and Engineering, University of Oulu, Oulu, 90014, Finland

    Jani Boutellier & Olli Silvén

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  1. Jani Boutellier
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  2. Olli Silvén
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Correspondence to Jani Boutellier.

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Boutellier, J., Silvén, O. Towards Generic Embedded Multiprocessing for RVC-CAL Dataflow Programs. J Sign Process Syst 73, 137–142 (2013). https://doi.org/10.1007/s11265-013-0737-3

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  • DOI: https://doi.org/10.1007/s11265-013-0737-3

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