Abstract
With the enhanced performance and convergence speed than their binary counterparts, NB-LDPC codes have been considered for emerging wireless communication and storage applications. However, one challenging issue to apply NB-LDPC codes in low-power embedded applications is the high decoding complexities. In this paper, we propose a comprehensive message length control technique that adaptively truncates decoding messages according to the domain-specific information. The number of arithmetic operations and memory accesses can be greatly reduced with shorter decoding messages. To implement the proposed technique, we propose a sequential decoder architecture which controls the decoding message length. Evaluation results show that the proposed technique can achieve significant power reduction than the conventional techniques while maintaining the same decoding performance.
Similar content being viewed by others
References
Song, H., & Cruz, J.R. (2003). Reduced-complexity decoding of q-ary LDPC codes for magnetic recording. IEEE Transactions Magnetics, 39, 1081–1087.
Huang, J., Zhou, S., & Willett, P. (2008). Nonbinary LDPC coding for multicarrier underwater acoustic communication. IEEE Journal on Selected Areas in Communications, 26, 1684–1696.
Tang, W., Huang, J., Wang, L., & Zhou, S. (2012). A nonbinary LDPC decoder architecture with adaptive message control. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20, 2118–2122.
Zhang, T., & Parhi, K.K. (2001). VLSI implementation-oriented (3, k) regular low-density parity-check codes. In Proc. 2001 IEEE Workshop on Signal Processing Systems (SiPS) (pp. 25–36).
Mansour, M.M., & Shanbhag, N.R. (2003). High-throughput LDPC decoders. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 11, 1063–8210.
Voicila, A., Decercq, D., Verdier, F., Fossorier, M., & Urard, P. (2007). Low-compleixty, low memory EMS algorithm for non-binary LDPC codes. In Proc. IEEE International Conference on Communications (ICC) (pp. 671–676).
Declercq, D., & Fossorier, M. (2007). Decoding algorithms for nonbinary LDPC codes over GF(q). IEEE Transactions on Communications, 55, 633–643.
Wymeersch, H., Steendam, H., & Moeneclaey, M. (2004). Log-domain decoding of LDPC codes over GF(q). In Proc. 2004 IEEE International Conference on Communications (ICC) (pp. 772–776).
Barnault, L., & Declercq, D. (2003). Fast decoding algorithm for LDPC over GF(2q). In Proc. 2003 IEEE Workshop on Information Theory Workshop (pp. 70–73).
Chen, J., Cui, J., & Wang, L. (2012). Energy-Adaptive modulation for RF power management under renewable energy. In Proc 2012 IEEE Workshop on Signal Processing Systems (SiPS) (pp. 173–178).
Chen, J., Zhao, D., & Wang, L. (2013). Link and energy adaptive uwb-based embedded sensing with renewable energy. In Proc. 2013 IEEE International Symposium on Circuits and Systems (ISCAS) (pp. 1825–1828).
Huang, W., & Wang, L. (2018). Design of GNSS receivers powered by renewable energy via adaptive tracking channel control. Journal of Signal Processing Systems, 90(3), 395–407.
Wan, L., Zhou, H., Xu, X., Huang, Y., Zhou, S., Shi, Z., & Cui, J.-H. (2015). Adaptive modulation and coding for underwater acoustic OFDM. IEEE Journal of Oceanic Engineering, 40(2), 327–336.
Abassi, O., Conde-Canencia, L., Al Ghouwayel, A., & Boutillon, E. (2017). A novel architecture for elementary-check-node processing in nonbinary LDPC decoders. IEEE Transactions on Circuits and Systems II:, Express Briefs, 64(2), 136–140.
Boutillon, E., & Conde-canencia, L. (2010). Simplified check node processing in nonbinary LDPC decoders. In 2010 6th International Symposium on Turbo Codes and Iterative Information Processing (ISTC) (pp. 201–205): IEEE.
Choi, I., & Kim, J.-H. (2018). Memory-Reduced Non-Binary LDPC decoding with accumulative bubble check. IEEE Transactions on Circuits and Systems II:, Express Briefs, 65(11), 1619–1623.
Huang, W., Tang, W., Chen, J., & Wang, L. (2019). Design of low-power non-binary LDPC decoder exploiting dram refresh rate over-scaling. IEEE Transactions on Circuits and Systems II:, Express Briefs, 66(8), 1391–1395.
Sen, S., Natarajan, V., Devarakond, S., & Chatterjee, A. (2014). Process-variation tolerant channel-adaptive virtually zero-margin low-power wireless receiver systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 33, 1764–1777.
Sheikh, F., Chen, C. -H., Yoon, D., Alexandrov, B., Bowman, K., Chun, A., Alavi, H., & Zhang, Z. (2014). 3.2Gbps channel-adaptive configurable MIMO detector for multi-mode wireless communication. In Proc. 2014 IEEE Workshop on Signal Processing Systems (SiPS) (pp. 192–197).
Huang, W., & Wang, L. (2015). A channel-adaptive nonbinary LDPC decoder. In 2015 IEEE Workshop on Signal Processing Systems (SiPS) (pp. 1–6): IEEE.
Tanner, R.M. (1981). A recursive approach to low complexity codes. IEEE Transactions on Information Theory, 27, 533–547.
Kschischang, F.R., Frey, B.J., & Loeliger, H.-A. (2001). Factor graphs and the sum-product algorithm. IEEE Transactions on Information Theory, 47, 498–519.
Zhou, S., & Wang, Z. (2014). OFDM for underwater acoustic communications. John Wiley & Sons.
Tang, W., Huang, J., Wang, L., & Zhou, S. (2011). Nonbinary LDPC decoding by Min-Sum with adaptive message control. In Proc. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) (pp. 3164–3167).
Chen, J., & Fossorier, M.P. (2002). Density evolution for two improved BP-based decoding algorithms of LDPC codes. IEEE Communications Letters, 6(5), 208–210.
Park, Y.S., Tao, Y., & Zhang, Z. (2015). A fully parallel nonbinary LDPC decoder with fine-grained dynamic clock gating. IEEE Journal of Solid-State Circuits, 50(2), 464–475.
Liang, X., Turgay, K., & Brooks, D. (2007). Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques. In 2007 IEEE/ACM International Conference on Computer-Aided Design (pp. 824–830): IEEE.
Tang, W., Chen, C.-H., & Zhang, Z. (2019). A 2.4mm2 130mW MMSE-nonbinary-LDPC iterative detector decoder for 4 × 4 256-QAM MIMO in 65-nm CMOS. IEEE Journal of Solid-State Circuits, 54(7), 2070–2080.
Acknowledgment
This work was supported by the National Science Foundation under CAREER Award CNS 0954037, CNS 1127084, and the Office of Naval Research under Grant N000141210345.
Author information
Authors and Affiliations
Corresponding author
Additional information
Publisher’s Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Rights and permissions
About this article
Cite this article
Huang, W., Wang, L. Low-Power Non-Binary LDPC Decoder Design via Adaptive Message Length Control Exploiting Domain-Specific Information. J Sign Process Syst 93, 11–23 (2021). https://doi.org/10.1007/s11265-020-01533-2
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s11265-020-01533-2