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A Disturbance Rejection Control Approach for Clock Synchronization in IEEE 1588 Networks

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Abstract

This paper is concerned with the clock synchronization problem for IEEE 1588 networks. First, the synchronization error is described as a bounded disturbance, and a linear extended state observer (LESO) is designed to estimate the lumped disturbance induced by the oscillator frequency drift and timestamps quantization errors. Then, the lumped disturbance is compensated by the proposed controller. The proposed approach has the advantage that it’s able to deal with non-Gaussian disturbance induced by accumulated quantization errors. Simulations are provided to validate the effectiveness and superiority of the proposed approach.

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Correspondence to Wenan Zhang.

Additional information

This research was supported by the Zhejiang Provincial Natural Science Foundation of China under Grant No. LR16F030005.

This paper was recommended for publication by Editor SUN Jian.

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Zhang, J., Zhang, W. A Disturbance Rejection Control Approach for Clock Synchronization in IEEE 1588 Networks. J Syst Sci Complex 31, 1437–1448 (2018). https://doi.org/10.1007/s11424-018-7050-y

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  • DOI: https://doi.org/10.1007/s11424-018-7050-y

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