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Testing of 1TnR RRAM array with sneak path technique

基于潜通路的1TnR结构阻变存储器测试方法

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创新点

本文利用潜通路电流作为故障表征, 提出针对1TnR结构的阻变存储器(RRAM)阵列测试方法。在提出一种基于潜通路的1TnR RRAM阵列测试读操作的基础上, 设计了一种新的1TnR RRAM测试算法, 可以较低的测试算法复杂度代价, 达到高故障覆盖率, 优于现有RRAM阵列测试算法。该算法对于阻值波动具有一定容忍能力, 适用于偏平型1TnR RRAM阵列的测试。

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Acknowledgements

This work was supported by National Basic Research Program of China (973) (Grant No. 2015CB057201), National Natural Science Foundation of China (Grant No. 61306040), Natural Science Foundation of Beijing (Grant No. 4152020), Natural Science Foundation of Guangdong Province (Grant No. 2015A030313147), and Guangdong Science & Technology Project (Grant No. 2014B090913001).

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Authors and Affiliations

  1. Key Laboratory of Integrated Microsystems, Peking University Shenzhen Graduate School, Shenzhen, 518055, China

    Xiaole Cui, Qiang Zhang & Xinan Wang

  2. Institute of Microelectronics, Peking University, Beijing, 100871, China

    Xiaoxin Cui, Jinfeng Kang & Xiaoyan Liu

Authors
  1. Xiaole Cui
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  2. Qiang Zhang
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  3. Xiaoxin Cui
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  4. Xinan Wang
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  5. Jinfeng Kang
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  6. Xiaoyan Liu
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Corresponding author

Correspondence to Xiaoxin Cui.

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The authors declare that they have no conflict of interest.

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Cui, X., Zhang, Q., Cui, X. et al. Testing of 1TnR RRAM array with sneak path technique. Sci. China Inf. Sci. 60, 029402 (2017). https://doi.org/10.1007/s11432-016-0015-7

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  • DOI: https://doi.org/10.1007/s11432-016-0015-7

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