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Parallel bitsliced AES through PHAST: a single-source high-performance library for multi-cores and GPUs

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Abstract

PHAST library is a high-level heterogeneous STL-like C\(++\) library that can be targeted on multi-core processors and Nvidia GPUs. It permits to exploit the performance of modern parallel architectures without the complexity of parallel programming. The library manages the programming and critical fine tuning of the parallel execution on both platforms without interfering with the application code structure, while maintaining the possibility to use architecture-specific features and instructions. In cryptography, performance and architectural efficiency of software implementations is crucial. This is witnessed by the extensive research in highly optimized and specialized versions of many protocols. In this paper, we assess the performance overhead and productivity improvement achievable through the PHAST library. We implement a pseudo random number generator (PRNG) based on cache-timing-attack resistant AES. We compare it with the fastest implementations in both CPU and Nvidia GPU domains. Achieved results show that the PHAST code is shorter and simpler than the state-of-the-art implementations. Its source length is 59.59% of the reference CUDA C implementation and 88.18% of the sequential C\(++\) version for CPUs, despite being the same for both targets. It is also far less complex in terms of McCabe’s and Halstead’s metrics. Results show that these productivity improvements induce a limited performance overhead of the library layer: less than 5% on single-thread execution for CPUs and around 10% on Nvidia GPUs. Furthermore, performance of the PHAST PRNG automatically scales with the available cores in a nearly linear fashion, allowing programmers to fully exploit multi-core resources with the same source code.

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Notes

  1. The exact amount of these components depends on the generation and the model of the graphic card.

  2. Within the global memory of the video card.

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Acknowledgements

We would like to thank Rone Kwei Lim for sharing with us the source code of his CUDA AES-based PRNG, which constituted a valuable reference for the experimental work described in this paper.

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Authors and Affiliations

  1. Dipartimento di Ingegneria dell’Informazione e Scienze Matematiche, Università degli Studi di Siena, Siena, Italy

    Biagio Peccerillo & Sandro Bartolini

  2. Department of Computer Science, University of California, Santa Barbara, CA, 93106, USA

    Çetin Kaya Koç

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  1. Biagio Peccerillo
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  2. Sandro Bartolini
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  3. Çetin Kaya Koç
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Correspondence to Biagio Peccerillo.

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Peccerillo, B., Bartolini, S. & Koç, Ç.K. Parallel bitsliced AES through PHAST: a single-source high-performance library for multi-cores and GPUs. J Cryptogr Eng 9, 159–171 (2019). https://doi.org/10.1007/s13389-017-0175-4

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