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Secure and Stateful Power Transitions in Embedded Systems

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Abstract

Power loss occurs in devices with a transient power supply, and it leads to the loss of volatile state information of the device. To protect the state, the device stores it as a checkpoint in non-volatile memory. The checkpoints are used to restore the device to the most recent stored state upon power-up. There are three facets of power transitions—cause, statefulness, and security, out of which the third facet is ignored in current embedded systems research. In this paper, we describe the intersection of two fields, stateful power transitions and secure embedded systems, which has largely been unexplored until now. We study the limitations introduced by the three facets of power transitions of embedded devices. We explore the vulnerabilities introduced by stateful power transitions and propose the Secure Intermittent Computing Protocol to overcome them. We analyze the overhead of each technology required to provide secure and stateful power transition and its effects on the duty cycle of an embedded device.

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Notes

  1. The encryption and tag calculation in AEAD operations are separated here to provide clarity in protocol operations

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Funding

This work was supported in part by NSF grant 1704176 and SRC GRC Task 2712.019.

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Authors and Affiliations

  1. Bradley Department of Electrical and Computer Engineering, Virginia Tech, Blacksburg, VA, 24060, USA

    Archanaa S. Krishnan & Patrick Schaumont

  2. Army Cyber Institute, U.S. Military Academy, West Point, NY, 10666, USA

    Charles Suslowicz

Authors
  1. Archanaa S. Krishnan
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  2. Charles Suslowicz
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  3. Patrick Schaumont
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Correspondence to Archanaa S. Krishnan.

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Krishnan, A.S., Suslowicz, C. & Schaumont, P. Secure and Stateful Power Transitions in Embedded Systems. J Hardw Syst Secur 4, 263–276 (2020). https://doi.org/10.1007/s41635-020-00099-6

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