Abstract
There have been amazing developments in the security applications of sensors for Internet of Things (IoT), which lead to the increasing demand for the System-on-a-Chip (SoC) based on Trusted Platform Module (TPM). Low-power design has become the key to enhancing the competitiveness of IoT’s product. The reconfigurable design can effectively reduce power consumption under the condition of ensuring the performance of the system. In this paper, a reconfigurable TPM with a power management module using 28nm CMOS process is proposed, which guarantees the energy saving and effectiveness of the chip. By integrating clock management, power management and multi-voltage management strategy, the designed TPM power management unit achieved a dynamic power reduction level of \(72.61\%\), a leakage power reduction level of \(82.05\%\) and a total power reduction of \(72.68\%\) with the combination of reconfigurable TPM chips without ultralow-power management.
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
References
Wu Z, Qiu K, Zhang J (2020) A Smart Microcontroller Architecture for the Internet of Things. Sensors 20(7):1821
Augustin A, Yi J, Clausen T et al (2016) A study of LoRa: Long range & low power networks for the internet of things. Sensors 16(9):1466
Thilakanathan D, Chen S, Nepal S et al (2014, June) Secure multiparty data sharing in the cloud using hardware-based TPM devices. In 2014 IEEE 7th International Conference on Cloud Computing (pp. 224-231). IEEE
Yu A, Feng D, Liu R (2009, August) Tbdrm: A tpm-based secure drm architecture. In 2009 International Conference on Computational Science and Engineering (Vol. 2, pp. 671-677). IEEE
Huang W, Xiong Y, Wang X et al (2013) Fine-grained refinement on tpm-based protocol applications. IEEE Trans Inf Forensics Secur 8(6):1013–1026
Yang P, Tao L, Wang H (2018) RTTV: a dynamic CFI measurement tool based on TPM. IET Inf Secur 12(5):438–444
Li X, Ma H, Yao W et al (2015) Data-driven and feedback-enhanced trust computing pattern for large-scale multi-cloud collaborative services. IEEE Trans Serv Comput 11(4):671–684
Liu H, Zhao B, Huang L (2019) Quantum image encryption scheme using Arnold transform and S-box scrambling. Entropy 21(4):343
Emeakaroha VC, Fatema K, van der Werff L et al (2016) A trust label system for communicating trust in cloud services. IEEE Trans Serv Comput 10(5):689–700
Infineon. (2018) OPTIGA TPM SLB 9645 TPM 1.2 Data Sheet. https://www.infineon.com/dgdl/
Infineon. (2015) OPTIGA\(\_\)TPM-PB-v10\(\_\)15-EN. https://www.infineon.com/dgdl/
Noguera J, Badia RM (2006) System-level power-performance tradeoffs for reconfigurable computing. IEEE transactions on very large scale integration (VLSI) systems, 14(7):730-739
Zhuo L, Prasanna VK (2007) Scalable and modular algorithms for floating-point matrix multiplication on reconfigurable computing systems. IEEE Trans Parallel Distrib Syst 18(4):433–448
Von Kaenel V, Macken P, Degrauwe MGR (1990) A voltage reduction technique for battery-operated systems. IEEE J Solid-State Circuits 25(5):1136–1140
Hisamoto D, Lee WC, Kedzierski J et al (2000) FinFET-a self-aligned double-gate MOSFET scalable to 20 nm. IEEE Trans Electron Devices 47(12):2320–2325
Annema A J, Veldhorst P, Doornbos G et al (2009, February) A sub-1V bandgap voltage reference in 32nm FinFET technology. In 2009 IEEE International Solid-State Circuits Conference-Digest of Technical Papers (pp. 332-333). IEEE
Itoh K (2013) A Historical Review of low-power, low-voltage digital MOS circuits development. IEEE Solid-State Circuits Mag 5(1):27–39
Schoellkopf JP, Magarshack P (2009) Low-Power Design Solutions for Wireless Multimedia SoCs. IEEE Des Test Comput 26(2):20–29
Mondal S, De A, Biswas PK (2005, January) A low power reprogrammable parallel processing VLSI architecture for computation of B-spline based medical image processing system for fast characterization of tiny objects suspended in cellular fluid. In 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (pp. 147-152). IEEE
Kim J, Ko H (2016) A dynamic instrumentation amplifier for low-power and low-noise biopotential acquisition. Sensors 16(3):354
Ma WJ, Luo CH, Lin JL et al (2016) A portable low-power acquisition system with a urease bioelectrochemical sensor for potentiometric detection of urea concentrations. Sensors 16(4):474
Hwang TH, Kim DS, Kim JG (2013) An on-time power-aware scheduling scheme for medical sensor SoC-based WBAN systems. Sensors 13(1):375–392
Gao Z, Zhou B, Li Y et al (2020) Design and Implementation of an On-Chip Low-Power and High-Flexibility System for Data Acquisition and Processing of an Inertial Measurement Unit. Sensors 20(2):462
Li X, Xie N, Tian X (2017) Dynamic voltage-frequency and workload joint scaling power management for energy harvesting multi-core WSN node SoC. Sensors 17(2):310
Martino R, Cilardo A (2019) A Flexible Framework for Exploring, Evaluating, and Comparing SHA-2 Designs. IEEE Access 7:72443–72456
Suresh V, Satpathy S, Mathew S et al (2018, September) A 230mv-950mv 2.8 tbps/w unified sha256/sm3 secure hashing hardware accelerator in 14nm tri-gate cmos. In ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC) (pp. 98-101). IEEE
Dilli R, Reddy PCS (2016, July) Trade-off between length of the Hash code and performance of hybrid routing protocols in MANETs. In 2016 2nd International Conference on Applied and Theoretical Computing and Communication Technology (iCATccT) (pp. 732-735). IEEE
Lin S, He S, Guo X et al (2017, October) An efficient algorithm for computing modular division over GF (2 m) in elliptic curve cryptography. In 2017 11th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID) (pp. 179-182). IEEE
Radhakrishnan D (2001) Low-voltage low-power CMOS full adder. IEE Proceedings-Circuits, Devices and Systems 148(1):19–24
Flynn D, Aitken R, Gibbons A et al (2007) Low power methodology manual: for system-on-chip design. Springer Science & Business Media
Baharloo M, Khonsari A (2018) A low-power wireless-assisted multiple network-on-chip. Microprocess Microsyst 63:104–115
Wang F, Tang X, Xing Z et al (2016) Low-cost and low-power unidirectional torus network-on-chip with corner buffer power-gating. Int J Electron 103(8):1332–1348
Yin S, Gu J, Liu D et al (2015) Joint Modulo Scheduling and \(V_ {\rm dd}\) Assignment for Loop Mapping on Dual-\(V_ {\rm dd}\) CGRAs. IEEE Trans Comput Aided Des Integr Circuits Syst 35(9):1475–1488
Mondal HK, Gade SH, Kaushik S et al (2017) Adaptive multi-voltage scaling with utilization prediction for energy-efficient wireless NoC. IEEE Transactions on Sustainable Computing 2(4):382–395
Hong S, Kim SW, Kim YJ (2017) LGC-DVS: Local gamma correction-based dynamic voltage scaling for android smartphones with AMOLED displays. IEEE J Electron Devices Soc 5(6):432–444
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Huang, Z., Zhang, X., Su, J. et al. Reconfigurable TPM Implemented with Ultralow-Power Management in 28nm CMOS Process for IoT SoC Design . J Hardw Syst Secur 5, 32–44 (2021). https://doi.org/10.1007/s41635-020-00109-7
Received:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s41635-020-00109-7