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Path Analysis and Renaming for Predicated Instruction Scheduling

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Abstract

Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural mechanism that increases instruction level parallelism by removing branches and allowing simultaneous execution of multiple paths of control, only committing instructions from the correct path. In order for the compiler to expose and use such parallelism, traditional compiler data-flow and path analysis needs to be extended to predicated code. In this paper, we motivate the need for renaming and for predicates that reflect path information. We present Predicated Static Single Assignment (PSSA) which uses renaming and introduces Full -Path Predicates to remove false dependences and enable aggressive predicated optimization and instruction scheduling. We demonstrate the usefulness of PSSA for Predicated Speculation and Control Height Reduction. These two predicated code optimizations used during instruction scheduling reduce the dependence length of the critical paths through a predicated region. Our results show that using PSSA to enable speculation and control height reduction reduces execution time from 12 to 68%.

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Authors and Affiliations

  1. Computer Science and Engineering Department, University of California at San Diego, San Diego, California, 92093-0114

    Lori Carter

  2. Computer Science and Engineering Department, University of California at San Diego, San Diego, California, 92093-0114

    Beth Simon, Brad Calder, Larry Carter & Jeanne Ferrante

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  1. Lori Carter
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  2. Beth Simon
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  3. Brad Calder
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  4. Larry Carter
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Carter, L., Simon, B., Calder, B. et al. Path Analysis and Renaming for Predicated Instruction Scheduling. International Journal of Parallel Programming 28, 563–588 (2000). https://doi.org/10.1023/A:1007512717742

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