Skip to main content
Log in

Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory

  • Published:
International Journal of Parallel Programming Aims and scope Submit manuscript

Abstract

Instruction scheduling methods which use the concepts developed by the classical pipeline theory have been proposed for architectures involving deeply pipelined function units. These methods rely on the construction of state diagrams (or automatons) to (i) efficiently represent the complex resource usage pattern; and (ii) analyze legal initiation sequences, i.e., those which do not cause a structural hazard. In this paper, we propose a state-diagram based approach for modulo scheduling or software pipelining, an instruction scheduling method for loops. Our approach adapts the classical pipeline theory for modulo scheduling, and, hence, the resulting theory is called Modulo-Scheduled pipeline (MS-pipeline) theory. The state diagram, called the Modulo-Scheduled (MS) state diagram is helpful in identifying legal initiation or latency sequences, that improve the number of instructions initiated in a pipeline. An efficient method, called Co-scheduling, which uses the legal initiation sequences as guidelines for constructing software pipelined schedules has been proposed in this paper. However, the complexity of the constructed MS-state diagram limits the usefulness of our Co-scheduling method. Further analysis of the MS-pipeline theory, reveals that the space complexity of the MS-state diagram can be significantly reduced by identifying primary paths. We develop the underlying theory to establish that the reduced MS-state diagram consisting only of primary paths is complete; i.e., it retains all the useful information represented by the original state diagram as far as scheduling of operations is concerned. Our experiments show that the number of paths in the reduced state diagram is significantly lower—by 1 to 3 orders of magnitude—compared to the number of paths in the original state diagram. The reduction in the state diagram facilitate the Co-scheduling method to consider multiple initiations sequences, and hence obtain more efficient schedules. We call the resulting method, enhanced Co-scheduling. The enhanced Co-scheduling method produced efficient schedules when tested on a set of 1153 benchmark loops. Further the schedules produced by this method are significantly better than those produced by Huff's Slack Scheduling method, a competitive software pipelining method, in terms of both the initiation interval of the schedules and the time taken to construct them.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

REFERENCES

  1. J. H. Patel and E. S. Davidson, Improving the Throughput of a Pipeline by Insertion of Delays, Proc. Third Ann. Symp. Computer Architecture, Clearwater, Florida, pp. 159–164 (January 1976).

  2. P. M. Kogge, The Architecture of Pipelined Computers, McGraw-Hill Book Co., New York (1981).

    Google Scholar 

  3. B. R. Rau and C. D. Glaeser, Some Scheduling Techniques and an Easily Schedulable Horizontal Architecture for High Performance Scientific Computing, Proc. 14th Ann. Microprogr. Workshop, Chatham, Massachusetts, pp. 183–198 (October 1981).

  4. P. Y. T. Hsu, Highly Concurrent Scalar Processing, Ph.D. Thesis, Technical Report, University of Illinois at Urbana-Champagne, Urbana, Illinois (1986).

    Google Scholar 

  5. M. Lam, Software Pipelining: An Effective Scheduling Technique for VLIW Machines, Proc. SIGPLAN Conf. Progr. Lang. Design and Implementation, Atlanta, Georgia, pp. 318–328 (June 1988).

  6. A. Aiken and A. Nicolau, A Realistic Resource-Constrained Software Pipelining Algorithm. In A. Nicolau, D. Gelernter, T. Gross, and D. Padua, (eds.), Advances in Languages and Compilers for Parallel Processing, Research Monographs in Parallel and Dist. Computing, Chapter 14, Pitman Publishing and the MIT Press, London, England, and Cambridge, Massachusetts, pp. 274–290 (1991).

    Google Scholar 

  7. F. Gasperoni and U. Schwiegelshohn, Efficient Algorithms for Cyclic Scheduling, Research Report RC 17068, IBM T. J. Watson Research Center, Yorktown Heights, New York (1991).

    Google Scholar 

  8. R. A. Huff, Lifetime-Sensitive Modulo Scheduling, Proc. ACM SIGPLAN Conf. Progr. Lang. Design and Implementation, Albuquerque, New Mexico, pp. 258–267 (June 1993).

  9. J. Wang and E. Eisenbeis, A New Approach to Software Pipelining of Complicated Loops with Branches, Research Report, Institut National de Recherche en Informatique et en Automatique (INRIA), Rocquencourt, France (January 1993).

    Google Scholar 

  10. J. C. Dehnert and R. A. Towle, Compiling for Cydra 5, J. Supercomputing, 7:181–227 (May 1993).

    Google Scholar 

  11. A. E. Eichenberger, E. S. Davidson, and S. G. Abraham, Minimum Register Requirements for a Modulo Schedule, Proc. 27th Ann. Intl. Symp. on Microarchitecture, San Jose, California, pp. 75–84 (December 1994).

  12. B. R. Rau, Iterative Modulo Scheduling: An Algorithm for Software Pipelining Loops, Proc. 27th Ann. Intl. Symp. on Microarchitecture, San Jose, California, pp. 63–74 (December 1994).

  13. R. Govindarajan, E. R. Altman, and G. R. Gao, Minimizing Register Requirements Under Resource-Constrained Rate-Optimal Software Pipelining, Proc. 27th Ann. Intl. Symp. on Microarchitecture, San Jose, California, pp. 85–94 (December 1994).

  14. E. R. Altman, R. Govindarajan, and G. R. Gao, Scheduling and Mapping: Software Pipelining in the Presence of Structural Hazards, Proc. ACM SIGPLAN Conf. Progr. Lang. Design and Implementation, La Jolla, California, pp. 139–150 (June 1995).

  15. J. Llosa, M. Valero, E. Ayguadé, and A. González, Hypernode Reduction Modulo Scheduling, Proc. 28th Ann. Intl. Symp. on Microarchitecture, Ann Arbor, Michigan, pp. 350–360 (December 1995).

  16. J. Llosa, A. González, M. Valero, and E. Ayguadé, Swing Modulo Scheduling: A Lifetime Sensitive Approach, Proc. Intl. Conf. on Parallel Architectures and Compilation Technique Microarchitecture, Boston, Massachusetts, pp. 80–86 (October 1996).

  17. B. R. Rau and J. A. Fisher, Instruction-Level Parallel Processing: History, Overview and Perspective, J. Supercomputing, 7:9–50 (May 1993).

    Google Scholar 

  18. E. S. Davidson, L. E. Shar, A. T. Thomas, and J. H. Patel, Effective Control for Pipelined Computers, Digest of Papers, 15th IEEE Computer Society International Conference, COMPCON Spring `75 (February 1975).

  19. T. Muller, Employing Finite State Automata for Resource Scheduling, Proc. 26th Ann. Intl. Symp. on Microarchitecture, Austin, Texas (December 1993).

  20. T. A. Proebsting and C. W. Fraser, Detecting Pipeline Structural Hazards Quickly, Conf. Record of the 21st ACM SIGPLAN-SIGACT Symp. on Principles of Programming Languages, Portland, Oregon, pp. 280–286 (January 1994).

  21. V. Bala and N. Rubin, Efficient Instruction Scheduling Using Finite State Automata, Proc. 28th Ann. Intl. Symp. on Microarchitecture, Ann Arbor, Michigan, pp. 46–56 (December 1995).

  22. R. Govindarajan, E. R. Altman, and G. R. Gao, Co-Scheduling Hardware and Software Pipelines, Proc. of the Second Intl. Symp. on High-Performance Computer Architecture, San Jose, California, pp. 52–61 (February 1996).

  23. R. Reiter, Scheduling Parallel Computations, J. ACM, 15(4):590–599 (October 1968).

    Google Scholar 

  24. S. Ramakrishnan, Software Pipelining in PA-RISC Compilers, Hewlett-Packard J., pp. 39–45 (June 1992).

  25. R. Govindarajan, N. S. S. Narasimha Rao, E. R. Altman, and G. R. Gao, An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams, Proc. Merged 12th Intl. Parallel Processing Symp. and Nineth Intl. Symp. on Parallel and Distributed Processing, Orlando, Florida (April 1998).

  26. C. Zhang, R. Govindarajan, S. Ryan, and G. R. Gao, Efficient State-Diagram Construction Methods for Software Pipelining, Proc. Eight Intl. Conf. on Compiler Construction, Amsterdam, The Netherlands (March 1999).

  27. J. K. Chaar and E. S. Davidson, Cyclic Job Shop Scheduling Using Collision Vectors, Technical Report CSE-TR-169-93, University of Michigan, Ann Arbor, Michigan (August 1993).

    Google Scholar 

  28. A. E. Eichenberger and E. S. Davidson, A Reduced Multipipeline Machine Description that Preserves Scheduling Constraints, Proc. ACM SIGPLAN Conf. Progr. Lang. Design and Implementation, Philadelphia, Pennsylvania (May 1996).

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

About this article

Cite this article

Govindarajan, R., Rao, N.S.S.N., Altman, E.R. et al. Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory. International Journal of Parallel Programming 28, 1–46 (2000). https://doi.org/10.1023/A:1007564126785

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1007564126785

Navigation