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Register Allocation—A Hierarchical Reduction Approach

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Abstract

A new approach to the problem of register allocation in high-level synthesis is presented. The algorithm employs a bottom-up transformational approach—sets of mutually exclusive variables in conditional branches are transformed into an “equivalent” set of nonmutually exclusive variables. The transformational approach is extended to the case of data-flow graphs with loops. A new register allocation algorithm is then used to produce an allocation for the nonmutually exclusive variables. From such an allocation, a corresponding allocation for the original set of mutually exclusive variables is derived. Our approach is particularly effective when there is a large number of nested conditional branches and loops in a data-flow graph.

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Authors and Affiliations

  1. 700 E. Middlefield Rd., Mountain View, CA, 94043, USA

    Chaeryung Park

  2. Department of Computer Science, Korea Advanced Institute of Science and Technology, Taejon, Korea

    Taewhan Kim

  3. Tsing Hua University, Hsinchu, Taiwan R.O.C

    C.L. Liu

Authors
  1. Chaeryung Park
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  2. Taewhan Kim
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  3. C.L. Liu
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Park, C., Kim, T. & Liu, C. Register Allocation—A Hierarchical Reduction Approach. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 19, 269–285 (1998). https://doi.org/10.1023/A:1008073925779

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  • DOI: https://doi.org/10.1023/A:1008073925779

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