Skip to main content
SpringerLink
Log in

Integration of the Scan-Test Method into an Architecture Specific Core-Test Approach

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

In this paper a concept is proposed to combine a bus-transfer based test approach (AMBA) with the well-known scan-test technique. This novel approach combines the advantages of modularity and core reuse (AMBA) with the benefits of high fault coverages and short time-to-market cycles (scan). The consequences with respect to test hardware implementation and tool flow are discussed.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Advanced RISC Machines, AMBA Advanced Microcontroller Bus Architecture Specification, ARM IHI 0001 D, Cambridge, April 1997.

  2. F. Hapke, “AutomaticTestpattern andTestprogram Generation for VLSI Scan Designs,” Proc. of the 2nd European Test Conference, Munich, April 1991.

  3. E. Marinissen, K. Kuiper, and C. Wouters, “Testability and Test Protocol Expansion in Hierarchical Macro Testing,” Proc. of the European Test Conference, Rotterdam, April 1993.

  4. M. Abramovici, M. Breuer, and A. Friedmann, Digital Systems Testing and Testable Design, IEEE, New York, 1990.

    Google Scholar 

  5. D. Flynn, “AMBA: Enabling Reusable On-Chip Designs,” IEEE Micro, July/Aug. 1997.

  6. E.J. Marinissen and M. Lousberg, “Macro Test: A Literal Test Approach for Embedded Reusable Cores,” IEEE Int. Workshop on Testing Embedded Core-Based Systems, Washington, DC, Nov. 1997.

Download references

Author information

Authors and Affiliations

  1. Philips Semiconductors, Business Line Cellular, Gerstweg 2, 6534 AE, Nijmegen, The Netherlands

    Chris Feige & Jan Ten Pierick

  2. Philips Semiconductors, ASIC Service Group, Prof. Holstlaan 4, 5656 AA, Eindhoven, The Netherlands

    Clemens Wouters

  3. University of Twente, MESA Research Institute, P.O. Box 217, 7500 AE, Enschede, The Netherlands

    Ronald Tangelder & Hans G. Kerkhoff

Authors
  1. Chris Feige
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Jan Ten Pierick
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Clemens Wouters
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Ronald Tangelder
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Hans G. Kerkhoff
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

About this article

Cite this article

Feige, C., Pierick, J.T., Wouters, C. et al. Integration of the Scan-Test Method into an Architecture Specific Core-Test Approach. Journal of Electronic Testing 14, 125–131 (1999). https://doi.org/10.1023/A:1008313726031

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1008313726031

Search

Navigation