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A Method for Designing a Deterministic Test Pattern Generator Based on Cellular Automata

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Abstract

This paper presents a new approach for designing a built-in test pattern generator based on cellular automata (CA). Given a set of precomputed test patterns, a test pattern generator is synthesized to apply the given test set in a minimal test time. The CA design is based on a novel matrix representation method that permits the use of the complete rule space and not only the additive rules. A synthesis tool has been developed to implement this design method. This synthesis tool provides a VHDL description of the resultant generator, which facilitates its integration into other VLSI design tools. This design technique has been applied to the combinational ISCAS benchmark circuits providing good results in terms of design time, performance and test time required by the generator.

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References

  1. M. Aboulhamid and E. Cerny, “A Class of Test Generators for Built-in Testing,” IEEE Trans. Computers, Vol. C-32, pp. 957–959, October 1983.

  2. R. Dandapani, J. Patel, and J. Abraham, “Design of Test Pattern Generators for Built-in Test,” Proc. Int. Test Conf., 1984, pp. 315–319.

  3. W. Daehn and J. Mucha, “A hardware approach to self-testing of large Programmable Logic Arrays,” IEEE Trans. Computers, Vol. C-30, pp. 829–833, November 1981.

  4. C. Starke, “Built-in Test for CMOS Circuits,” Proc. Int. Test Conf., 1984, pp. 309–314.

  5. C. Dufaza and C. Chevalier, “LFSROM. Basic Principle and BIST Application,” Proc. European Conf. Design Automation, 1993, pp. 211–216.

  6. S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, and B. Courtois, “Built-in Test for Circuits with Scan based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers,” IEEE Trans. Computers, Vol. 44, pp. 223–233, February 1995.

    Google Scholar 

  7. A. Kunzmann, “Generation of Deterministic Test Patterns by Minimal Basic Test Sets,” Proc. European Design Automation Conf., 1992, pp. 312–317.

  8. A. Das, M. Pandey, A. Gupta, and P. Pal Chaudhuri, “Built-in Self-Test Structures Around Cellular Automata and Counters,” IEE Proceedings, Vol. 137, pp. 269–276, July 1990.

  9. S. Boubezari and B. Kaminska, “A Deterministic Built-In Self-Test Generator Based on Cellular Automata Structures,” IEEE Trans. Computers, Vol. 44, pp. 805–816, June 1995.

    Google Scholar 

  10. M. Khare and A. Albicki, “Cellular automata used for test pattern generation,” Proc. IEEE Conf. Computer Design, 1987, pp. 56–59.

  11. S. Yap and A. Albicki, “Covering a set of test patterns by a cellular automaton,” Computer Science and Engineering Research Review, University of Rochester, 1987–88, pp. 35–39.

  12. D. Kagaris and S. Tragoudas, “Cellular Automata for Generating Deterministic Test Sequences,” Proc. European Design and Test Conf., 1997, pp. 77–81.

  13. F. Fummi and D. Sciuto, “Implicit Test Pattern Generation Constrained to Cellular Automata Embedding,” Proc. VLSI Test Symp., 1997, pp. 54–59.

  14. S. Chiusano, F. Corno, P. Prinetto, and M. Sonza Reorda. “Cellular Automata for Deterministic Sequential Test Pattern Generation,” Proc. VLSI Test Symp., 1997, pp. 60–65.

  15. F. Corno, N. Gaudenzi, P. Prinetto, and M. Sonza Reorda, “On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits,” Proc. VLSI Test Symp., 1998, pp. 424–429.

  16. S. Wolfram, “Statistical Mechanics of Cellular Automata,” Reviews Modern Physics, Vol. 55, pp. 601–644, July 1983.

  17. A. Das, M. Pandey, A. Gupta and P. Pal Chaudhuri, “Efficient Characterisation of Cellular Automata,” IEE Proc., Vol. 137, pp. 81–87, January 1990.

  18. P. Pal Chaudhuri, D. Roy Chowdhury, S. Nandi, and S. Chattopadhyay, Additive Cellular Automata: Theory and Applications, IEEE Computer Society Press, Los Alamitos (California), 1997.

    Google Scholar 

  19. F. Brglez and H. Fujiwara, “Aneutral netlist of 10 combinational circuits and a target translator in FORTRAN,” Proc. Int. Symp. Circuits and Systems, 1985, pp. 695–698.

  20. System Hilo—Hitest, Vol. 4, Genrad Inc., 1988.

  21. Synopsys—Synthesis v3.0b, Synopsys Inc., 1993.

  22. C. Dufaza, H. Viallon, and C. Chevalier, “BIST Hardware Generator for Mixed Test Scheme,” Proc. European Design and Test Conf., 1995, pp. 424–430.

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Authors and Affiliations

  1. TEISA Department, University of Cantabria, E.T.S.I.I.T., Avda. de los Castros, s/n, 39005, Santander, Spain

    María José López, Mar Martínez & Salvador Bracho

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  1. María José López
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  2. Mar Martínez
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  3. Salvador Bracho
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López, M.J., Martínez, M. & Bracho, S. A Method for Designing a Deterministic Test Pattern Generator Based on Cellular Automata. Journal of Electronic Testing 14, 245–258 (1999). https://doi.org/10.1023/A:1008314320628

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  • DOI: https://doi.org/10.1023/A:1008314320628

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