Abstract
This paper presents a new approach for designing a built-in test pattern generator based on cellular automata (CA). Given a set of precomputed test patterns, a test pattern generator is synthesized to apply the given test set in a minimal test time. The CA design is based on a novel matrix representation method that permits the use of the complete rule space and not only the additive rules. A synthesis tool has been developed to implement this design method. This synthesis tool provides a VHDL description of the resultant generator, which facilitates its integration into other VLSI design tools. This design technique has been applied to the combinational ISCAS benchmark circuits providing good results in terms of design time, performance and test time required by the generator.
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López, M.J., Martínez, M. & Bracho, S. A Method for Designing a Deterministic Test Pattern Generator Based on Cellular Automata. Journal of Electronic Testing 14, 245–258 (1999). https://doi.org/10.1023/A:1008314320628
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DOI: https://doi.org/10.1023/A:1008314320628