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Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes

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Abstract

Code checkers that monitor the outputs of a system can detect both permanent and transient faults. We present two novel architectures of embedded self-testing checkers for low-cost and cyclic arithmetic codes, one based on code word generators and adders, the other based on code word accumulators. In these schemes, the code checker receives all possible code words but one, irrespective of the number of different code words that are produced by the circuit under check (CUC). So any code checker can be employed that is self-testing for all or a particular subset of code words, and the structure of the code checker need not be tailored to the set of code words produced by the CUC. The proposed code word generators and accumulators are built from simple standard hardware structures, counters and end-around-carry adders. They can also be utilized in an off-line BIST environment as pattern generators and test response compactors.

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Stroele, A.P., Tarnick, S. Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes. Journal of Electronic Testing 16, 355–367 (2000). https://doi.org/10.1023/A:1008318002846

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