Skip to main content
Log in

Effect of Noise on Analog Circuit Testing

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

The effect of test environment noise (tester noise) on test waveforms is considered. We show that tests generated ignoring the tester noise characteristics are prone to failure when actually applied to the circuit-under-test (CUT). The failure may result in the good circuit being declared faulty or the faulty circuit being declared good. This failure is independent of the fault model and nature of the test, i.e., AC or DC, time domain or frequency domain. We characterize the total noise at the primary outputs (PO's) of the circuit using second order statistics. We use the noise power spectrum and root mean square (RMS) values to make decisions about the test waveforms and recommend more noise-robust tests. For non-linear circuits we use the Central Limit Theorem of statistics to approximate narrow band noise at a primary input (PI) by a sum of sinusoidal distributions, and we use Monte-Carlo simulations to determine the noise at the PO's in the time domain. Results of experiments on an instrumentation amplifier, a biquadratic filter, and a Gilbert multiplier are presented, which prove that valid tests in a noise-free environment are invalid when tester noise is considered.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Similar content being viewed by others

References

  1. P.R. Gray and R.G. Meyer, Analysis and Design of Analog Integrated Circuits, John Wiley & Sons, Inc., 1995, chap. 11, pp. 715–784.

  2. K. Joardar, “A Simple Approach to Modeling Cross-Talk in Integrated Circuits,” IEEE J. of Solid-State Circuits, Vol. 29, No. 10, pp. 1212–1219, Oct. 1994.

    Google Scholar 

  3. D.K. Su, M.J. Loinaz, S. Masui, and B.A. Wooley, “Experimental Results and Modeling Techniques for Substrate Noise in Mixed-Signal Integrated Circuits,” IEEE J. of Solid-State Circuits, Vol. 28, No. 4, pp. 420–430, April 1993.

    Google Scholar 

  4. R. Rohrer, L. Nagel, R. Meyer, and L. Weber, “Computationally Efficient Electronic-Circuit Noise Calculations,” IEEE J. of Solid-State Circuits, Vol. SC-6, No. 4, pp. 204–213, Aug. 1971.

    Google Scholar 

  5. T.W. Anderson, An Introduction to Multivariate Statistical Analysis. John Wiley & Sons, Inc., New York, 2nd edition, 1984.

    Google Scholar 

  6. R. Duda and P. Hart, Pattern Classification and Scene Analysis, Wiley, 1973, chap. 3, pp. 44–80.

  7. P. Bolcato and R. Poujois, “A New Approach for Noise Simulation in Transient Analysis,” Proc. of the IEEE Int. Symp. on Circuits and Systems, May 1992, pp. 887–890.

  8. A. Meixner and W. Maly, “Fault Modeling for the Testing of Mixed Integrated Circuits,” Proc. of the IEEE Int. Test Conf., Oct. 1991, pp. 564–572.

  9. G. Devarayanadurg and M. Soma, “Analytical Fault Modeling and Static Test Generation for Analog ICs,” Proc. of the Int. Conf. on Computer Aided Design, Nov. 1994, pp. 44–47.

  10. N.B. Hamida and B. Kaminska, “Multiple Fault Analog Circuit Testing by Sensitivity Analysis,” J. of Electronic Testing–Theory and App., Vol. 4, No. 2, pp. 331–343, Nov. 1993.

    Google Scholar 

  11. N. Nagi, A. Chatterjee, and J.A. Abraham, “DRAFTS: Discretized Analog Circuit Fault Simulator,” Proc. of the ACM/IEEE Design Automation Conf., June 1993, pp. 509–514.

  12. R. Ramadoss and M.L. Bushnell, “Test Generation for Mixed-Signal Devices using Signal Flow Graphs,” Proc. of the Ninth Int. Conf. on VLSI Design, Jan. 1996, pp. 242–248.

  13. M. Okumura, H. Tanimoto, T. Itakura, and T. Sugawara, Numerical Noise Analysis for Nonlinear Circuits with a Periodic Large Signal Excitation Including Cyclostationary Noise Sources, IEEE Trans. on Circuits and Systems, Vol. 40, No. 9, pp. 581–590, Sep. 1993.

    Google Scholar 

  14. A. Demir, “Time-Domain Non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations,” M.S. Project EECS Dept. UCB/ERL M94/39, U. California at Berkeley, May 1994.

  15. K. Helmreich and G. Reinwardt, “Virtual Test of Noise and Jitter Parameters,” Proc. of the Int. Test Conf., Oct. 1996, pp. 461–470.

  16. I.L. Wemple and A.T. Yang, “Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels,” Proc. of the ACM/IEEE Design Automation Conf., June 1995, pp. 439–444.

  17. W.R. Bennett, “Methods of Solving Noise Problems,” Proceedings of the Institute of Radio Engineers, Vol. 44, No. 2, May 1956, pp. 609–638.

    Google Scholar 

  18. C.A. Desoer and E.S. Kuh, Basic Circuit Theory, McGraw-Hill, New York, 1969, chap. 4, pp. 200–230.

    Google Scholar 

  19. G. Roberts, “Mixed-Signal Testing,” Tutorial at the Int. Test Conf., Washington, DC, USA, 1996.

  20. A.L. Rosenblum and M.S. Ghausi, “Multiparameter Sensitivity in Active RC Networks,” IEEE Trans. on Circuit Theory, Vol. CT-18, No. 6, pp. 592–599, Nov. 1971.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

About this article

Cite this article

Iyer, M.K., Bushnell, M. Effect of Noise on Analog Circuit Testing. Journal of Electronic Testing 15, 11–22 (1999). https://doi.org/10.1023/A:1008343108840

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1008343108840

Navigation