Abstract
Timing diagrams are popular in hardware design. They have been formalized for use in reasoning tasks, such as computer-aided verification. These efforts have largely treated timing diagrams as interfaces to established notations for which verification is decidable; this has restricted timing diagrams to expressing only regular language properties. This paper presents a timing diagram logic capable of expressing certain context-free and context-sensitive properties. It shows that verification is decidable for properties expressible in this logic. More specifically, it shows that containment of ω-regular languages generated by Büchi automata in timing diagram languages is decidable. The result relies on a correlation between timing diagram and reversal bounded counter machine languages.
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References
Alpern, B. and Schneider, F.B., 1985, “Defining liveness,” Information Processing Letters 21, 181–185.
Alur, R., Henzinger, T.A., and Vardi, M.Y., 1993, “Parametric real-time reasoning,” pp. 592–601 in Proceedings of the 25th ACM Symposium on the Theory of Computing, Association for Computing Machinery, ed., New York: ACM Press.
Berkane, B., Gandrabur, S., and Cerny, E., 1996, “Timing diagrams: Semantics and timing analysis,” LASSO, University of Montreal.
Brzozowski, J.A., Gahlinger, T., and Mavaddat, F., 1991, “Consistency and satisfiability of waveform timing specifications,” Networks 21, 91–107.
Cerny, E. and Khordoc, K., 1995, “Interface specifications with conjunctive timing constraints: Realizability and compatibility,” in Second AMAST Workshop on Real-Time Systems, D. Ionescu and A. Cornell, eds., Berlin: Springer-Verlag.
Damm, W., Josko, B., and Schlör, R., 1995, “Specification and verification of VHDL-based system-level hardware designs,” pp. 331–409 in Specification and Validation Methods, E. Börger, ed., Oxford: Oxford Science Publications.
Dillon, L.K., Kutty, G., Moser, L.E., Melliar-Smith, P.M., and Ramakrishna, Y.S., 1993, “A graphical interval logic for specifying concurrent systems,” Technical Report, UCSB.
Fisler, K., 1996, “A unified approach to hardware verification through a heterogeneous logic of design diagrams,” Ph.D. Thesis, Indiana University.
Fisler, K., 1997, “Containment of regular languages in non-regular timing diagram languages is decidable,” pp. 155–166 in Proceedings of the International Conference on Computer-Aided Verification (CAV), O. Grumberg, ed., Berlin: Springer-Verlag.
Ginsburg, S., 1966, The Mathematical Theory of Context-Free Languages, New York: McGraw-Hill.
Harel, D. and Raz, D., 1993, “Deciding properties of nonregular programs,” SIAM Journal of Computing 22(4), 857–874.
Hopcroft, J.E. and Ullman, J.D., 1979, Introduction to Automata Theory, Languages and Computation, Reading, MA: Addison-Wesley.
Ibarra, O.H., 1978, “Reversal-bounded multicounter machines and their decision problems,” Journal of the ACM 25(1), 116–133.
Ibarra, O.H., Jiang, T., Tran, N., and Wang, H., 1993, “New decidability results concerning two way counter machines and applications,” pp. 313–324 in Proceedings of the 20th International Colloquium on Automata, Languages, and Programming (ICALP), A. Lingas, R. Karlsson, and S. Carlsson, eds., Lecture Notes in Computer Science, Vol. 700, Berlin: Springer-Verlag.
Jahanian, F., Mok, A.K., and Stuart, D.A., 1988, “Formal specification of real-time systems,” Technical Report CS-TR-88-25, Department of Computer Science, University of Texas at Austin.
Khordoc, K., Dufresne, M., Cerny, E., Babkine, P.A., and Silburt, A., 1993, “Integrating behavior and timing in executable specifications,” pp. 385–402 in Proceedings of Computer Hardware Description Languages and their Applications, D. Agnew, L. Claesen, and R. Camposano, eds., Amsterdam: North-Holland.
Kurshan, R.P., 1994, Computer-Aided Verification of Coordinating Processes: The Automata-Theoretic Approach, Princeton, NJ: Princeton University Press
Mooeschler, P., Amann, H.P., and Pellandini, P., 1993, “High-level modeling using extended timing diagrams,” pp. 494–499 in Proceedings of the European Design Automation Conference, Washington, DC: IEEE Computer Society Press.
Pnueli, A., 1977, “The temporal logic of programs,” pp. 46–57 in Proceedings of the Eighth Annual Symposium on Foundations of Computer Science.
Ramakrishna, Y.S., Dillon, L.K., Moser, L.E., Melliar-Smith, P.M., and Kutty, G., 1993, “A realtime interval logic and its decision procedure,” pp. 173–192 in Proceedings of the Thirteenth Conference on Foundations of Software Technology and Theoretical Computer Science, R. Shyamasundar, ed., Lecture Notes in Computer Science, Vol. 761, Berlin: Springer-Verlag.
Thomas, W., 1990, “Automata on infinite objects,” pp. 133–191 in Handbook of Theoretical Computer Science, Volume B, J. van Leeuwen, ed., Amsterdam: Elsevier Science Publishers.
Vardi, M.Y. and Wolper, P., 1986, “An automata-theoretic approach to automatic program verification,” pp. 332–344 in Proceedings of the First IEEE Symposium on Logic and Computer Science (LICS), Washington, DC: IEEE Computer Society Press.
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Fisler, K. Timing Diagrams: Formalization and Algorithmic Verification. Journal of Logic, Language and Information 8, 323–361 (1999). https://doi.org/10.1023/A:1008345113376
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DOI: https://doi.org/10.1023/A:1008345113376