Abstract
In this paper an effective Built-In Self-Test (BIST) scheme for the shifter-accumulator pair (accumulation performed either by an adder or an ALU) which appears very often in embedded processor, microprocessor or DSP datapaths is introduced. The BIST scheme provides very high fault coverage (>99%) with respect to the stuck-at fault model for any datapath width with a regular, very small and counter-generated deterministic test set, as it is verified by a comprehensive set of experiments.
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Kranitis, N., Paschalis, A., Gizopoulos, D. et al. An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. Journal of Electronic Testing 17, 97–107 (2001). https://doi.org/10.1023/A:1011113508662
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DOI: https://doi.org/10.1023/A:1011113508662