Skip to main content
SpringerLink
Log in

Device Driver and DMA Controller Synthesis from HW /SW Communication Protocol Specifications

  • Published:
Design Automation for Embedded Systems Aims and scope Submit manuscript

Abstract

We have separated the information requiredfor HW/SW interface synthesis into three parts,the protocol specification, the operating system related information,and the processor related information. From these inputs a synthesistool generates (a) device driver functions or (b) a combinationof device driver functions and a DMA controller, depending ona designer's decision. The clean separation of information facilitates(1) efficient design space exploration with combinations of differentprocessors, operating systems and protocols, and (2) maintaininga large number of different versions and variants of HW/SWinterfaces by synthesising them on demand. Protocols are specifiedas a grammar, which is fully independent of architecture andimplementation. From this the synthesis tool generates devicedriver code in C and/or synthesizable RTL codein VHDL for DMA controllers. After the initial selection of implementationalternatives the presented methods are fully automated. Its computationalcomplexity is quadratic in terms of the number of states. Withreal-life examples we show that the quality of the generatedcode is close to hand written quality in terms of performance,area and code size.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. ARM Software Development Toolkit-Reference Manual, Version 2.0, Advanced RISC Machines Ltd., 1995.

  2. F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, A, Jurecska, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovich, K. Suzuki, and B. Tabbara, Hardware-Software Co-Design of Embedded Systems: The Polis Approach. Kluwer Academic Press, 1997.

  3. B. Bohem, B. Clark. E. Horowitz, C. Westland, R. Madachy, and R. Selby, Cost models for future software life cycle processes: COCOMO 2.0, Annals of Software Engineering, Vol. 1, pp. 57–94, 1995.

    Google Scholar 

  4. I. Bolsens, H. J. De Man, B. Linn, K. van Rompaey, S. Vercauteren, and D. Verkest, Hardware/software co-design of digital telecommunication systems, Proceedings of the IEEE, Vol. 85, No. 3, pp. 391–418, 1997.

    Google Scholar 

  5. P. H. Chou, R. B. Ortega, and G. Borriello, The Chinook hardware/software co-synthesis system, Proceedings of the International Symposium on System Synthesis, 1995.

  6. P. H. Chou, R. B. Ortega, and G. Borriello, Synthesis of the hardware/software interface in microcontrollerbased systems, Proceedings of the International Conference on Computer Aided Design, pp. 488–495, 1992.

  7. J-M Daveau, G. F. Marchioro, T. Ben-Ismail, and A. A. Jerraya, Protocol selection and interface generation for hw-sw codesign, IEEE Transaction on Very Large Scale Integration, Vol. 5, No. 1, pp. 136–144, 1997.

    Google Scholar 

  8. M. De Prycker, Asynchronous Transfer Mode. Prentice Hall, 1995.

  9. J. C. Días, J. Riesco, and P. Plaza, Design of an ARM based system-on-a-chip for pay phones, Proceedings of the International Workshop on IP Based Synthesis and System Design, pp. 101–105, 1998.

  10. EIA/TIA Interim Standard, Cellular System Dual-Mode Mobile Station—Base Station Compatibility Standard, IS-54-B, April, 1992.

  11. M. Eisenring and J. Teich, Domain-specific interface generation from dataflow specifications, Proceedings of the 6th International Workshop on Hardware/Software Codesign, pp. 43–47, 1998.

  12. R. Ernst and Th. Benner, Communication, Constraints and User Directives in COSYMA, Technical Report CY-94-2, Technische Universität Braunschweig, June 1994.

  13. S. Furber, ARM System Architecture, Addison Wesley Longman, ISBN 0-201-40352-8, 1996.

  14. R. Grehan, Driver assistance, Computer Design, vol. 36, no. 1, pp. 75–80, 1997.

    Google Scholar 

  15. INTROL/CODE-Reference Manual, Introl Inc., Milwaukee, WI 53202 USA, 1999.

  16. D. C. R. Jensen, J. Madsen, and S. Pedersen, The importance of interfaces: A HW/SW codesign case study, Proceedings of 5th International Workshop on Codesign, 1997.

  17. A. A. Jerraya and K. O'Brien, SOLAR: An intermediate format for system-level modeling and synthesis, Computer Aided Software/Hardware Engineering, Ed. J. Rozenblit, IEEE Publisher, chap. 10, 1994.

  18. S. C. Johnsson, Yet another compiler compiler, Computing Science Tech. Rep. 32, AT&T Bell Lab., Murray Hill, 1975.

    Google Scholar 

  19. J. J. Labrosse, mC/OS-The Real-Time Kernel. R&D Publications, Lawrence, Kansas 66046, 1992.

    Google Scholar 

  20. MAX 197-Multi-Range 12-bit ADC, Data sheet, Maxim Integrated Products, CA.

  21. MAX 530-Multi-Range 12-bit DAC, Data sheet, Maxim Integrated Products, CA.

  22. MC68000 Family Reference Manual. Motorola Inc., 1990.

  23. R. Niemann and P. Marwedel, Synthesis of communicating controllers for concurrent hardware/software systems, Proceedings of Design Automation and Test in Europe, pp. 912–913, 1998.

  24. M. O'Nils, Specification, Synthesis and Validation of Hardware/Software Interfaces. PhD Thesis, TRITAESD-1999-04, Kungliga Tekniska Högskolan (KTH), Stockholm, Sweden, June 1999.

    Google Scholar 

  25. M. O'Nils, J. Öberg and A. Jantsch, Grammar based modelling and synthesis of device drivers and bus interfaces, Proceedings of Euromicro Conference, pp. 55–58, 1998.

  26. M. O'Nils and A. Jantsch, Multi-phase validation of hardware/software interfaces based on generated simulation models, Proceedings of IEEE Workshop on High Level Design, Validation and Test, pp. 32–40, 1998.

  27. R. B. Ortega and G. Borriello, Communication synthesis for distributed embedded systems, Proceedings of the International Conference on Computer Aided Design, 1998.

  28. R. B. Ortega, L. Lavagno, and G. Borriello, Models and methods for hw/sw intellectual property interfacing, NATO ASI on System-level Synthesis, 1998.

  29. A. Seawright, U. Holtmann, W. Meyer, B. Pangrle, R. Verbrugghe, and J. Buck, A system for compiling and debugging structured data processing controllers, Proceedings of the European Design Automation Conference, 1996.

  30. TL16552-Dual Asynchronous Communications Element with FIFO, Data sheet, Texas Instruments Inc., 1996.

  31. E. Tuggle, Writing device drivers, Embedded Systems Programming, Jan. 1993, pp. 42–65.

  32. F. Vahid and L. Tauro, An object-oriented communication library for hardware-software codesign, Proceedings of 5th International Workshop on Hardware/Software Codesign, 1997.

  33. Z80-Microprocessor Family User's Manual, Zilog Inc., 1994.

  34. J. Öberg, A. Kumar, and A. Hemani, Grammar-based hardware synthesis of data communication protocols, Proceedings of the 9th International Symposium on System Synthesis, pp. 14–19, 1996.

Download references

Author information

Authors and Affiliations

  1. Department of Information Technology, Mid Sweden University, SE-851 70, Sundsvall, Sweden

    MATTIAS O'Nils

  2. Department of Electronics, Electronic System Design Laboratory, Royal Institute of Technology, Electrum 229, SE-164 40, Kista, Sweden

    AXEL Jantsch

Authors
  1. MATTIAS O'Nils
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. AXEL Jantsch
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

About this article

Cite this article

O'Nils, M., Jantsch, A. Device Driver and DMA Controller Synthesis from HW /SW Communication Protocol Specifications. Design Automation for Embedded Systems 6, 177–205 (2001). https://doi.org/10.1023/A:1011246731756

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1011246731756

Search

Navigation