Skip to main content

Advertisement

Springer Nature Link
Log in

Architecture Concepts for Multimedia Signal Processing

  • Published:
Journal of VLSI signal processing systems for signal, image and video technology Aims and scope Submit manuscript

Abstract

Architectural concepts are presented aimed at future multimedia processing schemes. Starting from an analysis of current and future multimedia applications, specific computational requirements are derived. It will be shown that multimedia applications benefit from an exhaustive and flexible exploitation of parallelism. Three architectural concepts—reconfigurable computing, simultaneous multithreading, and associative controlling—are presented, and their potential to increase further the performance on future multimedia applications is investigated.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

Explore related subjects

Discover the latest articles and news from researchers in related subjects, suggested using machine learning.

References

  1. B.G. Haskell, D.G. Howard, Y. LeCun, A. Puri, J. Ostermann, M.R. CivanCat, L. Rabines, L. Bottou, and P. Haffnes, “Image and Video Coding—Emerging Standards and Beyond, ” IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, no. 7, 1998, pp. 814–837.

    Article  MATH  Google Scholar 

  2. T. Chen, K.J.R. Liu, and A.M. Tekalp (Eds.), “Multimedia Signal Processing I/II, ” Proceedings of the IEEE (Special Issue), vol. 86, no. 5/6, May/June 1998.

  3. P. Pirsch and H.-J. Stolberg, “VLSI Implementations of Image and Video Multimedia Processing Systems, ” IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, no. 7, 1998, pp. 878–891.

    Article  Google Scholar 

  4. S.A. Guccione, “List of FPGA-based Computing Machines, ” http://www.io.com/-guccione/HW list.html, last updated March 31, 1999.

  5. B. Radunovic and V. Milutinovic, “A Survey of Reconfigurable Computing Architectures, ” 8th International Workshop on Field-Programmable Logic and Applications, Tallinn, Estonia, Aug./Sept. 1998, pp. 376–385.

  6. E. Mirsky and A. DeHon, “MATRIX: A Reconfigurable Computing Architecture with Configurable Instruction Distribution and Deployable Resources, ” in Proceedings of the IEEE Symposium on FPGAs for Custom Computing Maschines, April 1996, pp. 157–166.

  7. Jan M. Rabaey, “Reconfigurable Processing: The Solution to Low-Power Programmable DSP, ” in Proceedings of 1997 ICASSP Conference, Munich, April 1997.

  8. D.M. Tullsen, S.J. Eggers, and H.M. Levy, “Simultaneous Multithreading: Maximizing On-Chip Parallelism, ” in Proc.of 22 nd Annual International Symposium on Computer Architecture, Santa Margherita Ligure, June 1995.

  9. J.P. Wittenburg, P. Pirsch, and G. Meyer, “A Multithreaded Ar-chitecture Approach to Parallel DSPs for High Performance Image Processing Applications, ” in Proc.of the IEEE Workshop on Signal Processing Systems, Taipeh, Oct. 1999.

  10. H. Oehring, U. Sigmund, and T. Ungerer, “Simultaneous Multithreading and Multimedia, ” in Proc.of the Workshop on Multithreaded Execution, Architecture and Compilation, Orlando, Jan. 1999.

  11. W. Gehrke and K. Gaedke, “Associative Controlling of Monolithic Parallel Processor Architectures, ” IEEE Transactions onCircuits and Systems for Video Technology, vol. 5, no. 5, 1995, pp. 453–464.

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Institut für Theoretische Nachrichtentechnik und Informationsverarbeitung, Universität Hannover, Appelstr. 4, 30167, Hannover, Germany

    Peter Pirsch, Carsten Reuter, Jens Peter Wittenburg, Mark B. Kulaczewski & Hans-Joachim Stolberg

Authors
  1. Peter Pirsch
    View author publications

    You can also search for this author inPubMed Google Scholar

  2. Carsten Reuter
    View author publications

    You can also search for this author inPubMed Google Scholar

  3. Jens Peter Wittenburg
    View author publications

    You can also search for this author inPubMed Google Scholar

  4. Mark B. Kulaczewski
    View author publications

    You can also search for this author inPubMed Google Scholar

  5. Hans-Joachim Stolberg
    View author publications

    You can also search for this author inPubMed Google Scholar

Rights and permissions

Reprints and permissions

About this article

Cite this article

Pirsch, P., Reuter, C., Wittenburg, J.P. et al. Architecture Concepts for Multimedia Signal Processing. The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology 29, 157–165 (2001). https://doi.org/10.1023/A:1012275211807

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1023/A:1012275211807